From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52085) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b5whY-0007SM-Ph for qemu-devel@nongnu.org; Thu, 26 May 2016 10:55:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b5whT-00057W-Rx for qemu-devel@nongnu.org; Thu, 26 May 2016 10:55:55 -0400 From: Peter Maydell Date: Thu, 26 May 2016 15:55:31 +0100 Message-Id: <1464274540-19693-14-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1464274540-19693-1-git-send-email-peter.maydell@linaro.org> References: <1464274540-19693-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH v2 13/22] hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org, Shlomo Pongratz , Shlomo Pongratz , Pavel Fedin , Shannon Zhao , Christoffer Dall Wire up the MMIO functions exposed by the distributor and the redistributor into MMIO regions exposed by the GICv3 device. Signed-off-by: Peter Maydell --- hw/intc/arm_gicv3.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/hw/intc/arm_gicv3.c b/hw/intc/arm_gicv3.c index 7c4bee6..e8f6766 100644 --- a/hw/intc/arm_gicv3.c +++ b/hw/intc/arm_gicv3.c @@ -324,6 +324,19 @@ static void arm_gicv3_post_load(GICv3State *s) gicv3_cache_all_target_cpustates(s); } +static const MemoryRegionOps gic_ops[] = { + { + .read_with_attrs = gicv3_dist_read, + .write_with_attrs = gicv3_dist_write, + .endianness = DEVICE_NATIVE_ENDIAN, + }, + { + .read_with_attrs = gicv3_redist_read, + .write_with_attrs = gicv3_redist_write, + .endianness = DEVICE_NATIVE_ENDIAN, + } +}; + static void arm_gic_realize(DeviceState *dev, Error **errp) { /* Device instance realize function for the GIC sysbus device */ @@ -337,7 +350,7 @@ static void arm_gic_realize(DeviceState *dev, Error **errp) return; } - gicv3_init_irqs_and_mmio(s, gicv3_set_irq, NULL); + gicv3_init_irqs_and_mmio(s, gicv3_set_irq, gic_ops); } static void arm_gicv3_class_init(ObjectClass *klass, void *data) -- 1.9.1