From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org, Shlomo Pongratz <shlomo.pongratz@huawei.com>,
Shlomo Pongratz <shlomopongratz@gmail.com>,
Pavel Fedin <p.fedin@samsung.com>,
Shannon Zhao <shannon.zhao@linaro.org>,
Christoffer Dall <christoffer.dall@linaro.org>
Subject: [Qemu-devel] [PATCH v2 01/22] migration: Define VMSTATE_UINT64_2DARRAY
Date: Thu, 26 May 2016 15:55:19 +0100 [thread overview]
Message-ID: <1464274540-19693-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1464274540-19693-1-git-send-email-peter.maydell@linaro.org>
Define a VMSTATE_UINT64_2DARRAY macro, to go with the ones we
already have for other type sizes.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/migration/vmstate.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h
index 30ecc44..aec9531 100644
--- a/include/migration/vmstate.h
+++ b/include/migration/vmstate.h
@@ -846,6 +846,12 @@ extern const VMStateInfo vmstate_info_bitmap;
#define VMSTATE_UINT64_ARRAY(_f, _s, _n) \
VMSTATE_UINT64_ARRAY_V(_f, _s, _n, 0)
+#define VMSTATE_UINT64_2DARRAY(_f, _s, _n1, _n2) \
+ VMSTATE_UINT64_2DARRAY_V(_f, _s, _n1, _n2, 0)
+
+#define VMSTATE_UINT64_2DARRAY_V(_f, _s, _n1, _n2, _v) \
+ VMSTATE_2DARRAY(_f, _s, _n1, _n2, _v, vmstate_info_uint64, uint64_t)
+
#define VMSTATE_INT16_ARRAY_V(_f, _s, _n, _v) \
VMSTATE_ARRAY(_f, _s, _n, _v, vmstate_info_int16, int16_t)
--
1.9.1
next prev parent reply other threads:[~2016-05-26 15:24 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-26 14:55 [Qemu-devel] [PATCH v2 00/22] GICv3 emulation Peter Maydell
2016-05-26 14:55 ` Peter Maydell [this message]
2016-06-07 3:32 ` [Qemu-devel] [PATCH v2 01/22] migration: Define VMSTATE_UINT64_2DARRAY Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 02/22] bitops.h: Implement half-shuffle and half-unshuffle ops Peter Maydell
2016-06-07 6:35 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 03/22] target-arm: Define new arm_is_el3_or_mon() function Peter Maydell
2016-06-07 6:32 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 04/22] target-arm: Provide hook to tell GICv3 about changes of security state Peter Maydell
2016-06-14 1:49 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 05/22] target-arm: Add mp-affinity property for ARM CPU class Peter Maydell
2016-06-07 7:55 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 06/22] hw/intc/arm_gicv3: Add state information Peter Maydell
2016-06-07 7:51 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 07/22] hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure Peter Maydell
2016-06-07 8:33 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 08/22] hw/intc/arm_gicv3: Add vmstate descriptors Peter Maydell
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 09/22] hw/intc/arm_gicv3: ARM GICv3 device framework Peter Maydell
2016-06-07 9:01 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 10/22] hw/intc/arm_gicv3: Implement functions to identify next pending irq Peter Maydell
2016-06-08 1:57 ` Shannon Zhao
2016-06-09 15:24 ` Peter Maydell
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 11/22] hw/intc/arm_gicv3: Implement GICv3 distributor registers Peter Maydell
2016-06-13 6:27 ` Shannon Zhao
2016-06-13 9:04 ` Peter Maydell
2016-06-13 9:35 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 12/22] hw/intc/arm_gicv3: Implement GICv3 redistributor registers Peter Maydell
2016-06-14 3:09 ` Shannon Zhao
2016-06-14 12:25 ` Peter Maydell
2016-06-14 12:28 ` Peter Maydell
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 13/22] hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions Peter Maydell
2016-06-13 7:19 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 14/22] hw/intc/arm_gicv3: Implement gicv3_set_irq() Peter Maydell
2016-06-13 7:49 ` Shannon Zhao
2016-06-13 9:07 ` Peter Maydell
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 15/22] hw/intc/arm_gicv3: Implement GICv3 CPU interface registers Peter Maydell
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 16/22] hw/intc/arm_gicv3: Implement gicv3_cpuif_update() Peter Maydell
2016-06-13 7:56 ` Shannon Zhao
2016-06-13 9:10 ` Peter Maydell
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 17/22] hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers Peter Maydell
2016-06-14 6:24 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 18/22] hw/intc/arm_gicv3: Add IRQ handling CPU interface registers Peter Maydell
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 19/22] target-arm/machine.c: Allow user to request GICv3 emulation Peter Maydell
2016-06-13 11:38 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 20/22] target-arm/monitor.c: Advertise emulated GICv3 in capabilities Peter Maydell
2016-06-13 11:40 ` Shannon Zhao
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 21/22] NOT-FOR-UPSTREAM: kernel: Add definitions for GICv3 attributes Peter Maydell
2016-06-13 11:51 ` Shannon Zhao
2016-06-13 12:02 ` Peter Maydell
2016-05-26 14:55 ` [Qemu-devel] [PATCH v2 22/22] RFC: hw/intc/arm_gicv3_kvm: Implement get/put functions Peter Maydell
2016-05-30 11:15 ` [Qemu-devel] [PATCH v2 00/22] GICv3 emulation Andrew Jones
2016-06-06 14:42 ` [Qemu-devel] [Qemu-arm] " Peter Maydell
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