From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40501) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b6697-00008D-M2 for qemu-devel@nongnu.org; Thu, 26 May 2016 21:01:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b6694-0004Bl-Jk for qemu-devel@nongnu.org; Thu, 26 May 2016 21:01:01 -0400 Received: from mail-qg0-x243.google.com ([2607:f8b0:400d:c04::243]:34093) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b6694-0004Be-Ft for qemu-devel@nongnu.org; Thu, 26 May 2016 21:00:58 -0400 Received: by mail-qg0-x243.google.com with SMTP id e35so2495934qge.1 for ; Thu, 26 May 2016 18:00:58 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Thu, 26 May 2016 18:00:09 -0700 Message-Id: <1464310815-13554-7-git-send-email-rth@twiddle.net> In-Reply-To: <1464310815-13554-1-git-send-email-rth@twiddle.net> References: <1464310815-13554-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v2 06/12] tcg/mips: Add support for fence List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: bobby.prani@gmail.com Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.inc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 50e98ea..cad1d4d 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -292,6 +292,7 @@ typedef enum { OPC_JALR = OPC_SPECIAL | 0x09, OPC_MOVZ = OPC_SPECIAL | 0x0A, OPC_MOVN = OPC_SPECIAL | 0x0B, + OPC_SYNC = OPC_SPECIAL | 0x0F, OPC_MFHI = OPC_SPECIAL | 0x10, OPC_MFLO = OPC_SPECIAL | 0x12, OPC_MULT = OPC_SPECIAL | 0x18, @@ -1636,6 +1637,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const_args[4], const_args[5], true); break; + case INDEX_op_fence: + tcg_out32(s, OPC_SYNC); + break; case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ case INDEX_op_call: /* Always emitted via tcg_out_call. */ @@ -1716,6 +1720,8 @@ static const TCGTargetOpDef mips_op_defs[] = { { INDEX_op_qemu_ld_i64, { "L", "L", "lZ", "lZ" } }, { INDEX_op_qemu_st_i64, { "SZ", "SZ", "SZ", "SZ" } }, #endif + + { INDEX_op_fence, { } }, { -1 }, }; -- 2.5.5