From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40650) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b669B-0000Ca-Ui for qemu-devel@nongnu.org; Thu, 26 May 2016 21:01:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b6696-0004C9-25 for qemu-devel@nongnu.org; Thu, 26 May 2016 21:01:05 -0400 Received: from mail-qk0-x244.google.com ([2607:f8b0:400d:c09::244]:36318) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b6695-0004C5-Tg for qemu-devel@nongnu.org; Thu, 26 May 2016 21:00:59 -0400 Received: by mail-qk0-x244.google.com with SMTP id l68so11206578qkf.3 for ; Thu, 26 May 2016 18:00:59 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Thu, 26 May 2016 18:00:10 -0700 Message-Id: <1464310815-13554-8-git-send-email-rth@twiddle.net> In-Reply-To: <1464310815-13554-1-git-send-email-rth@twiddle.net> References: <1464310815-13554-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v2 07/12] tcg/ppc: Add support for fence List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: bobby.prani@gmail.com Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.inc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index da10052..ea576f9 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -469,6 +469,9 @@ static int tcg_target_const_match(tcg_target_long val, TCGType type, #define STHX XO31(407) #define STWX XO31(151) +#define HWSYNC XO31(598) +#define LWSYNC (HWSYNC | (1u << 21)) + #define SPR(a, b) ((((a)<<5)|(b))<<11) #define LR SPR(8, 0) #define CTR SPR(9, 0) @@ -2439,6 +2442,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, tcg_out32(s, MULHD | TAB(args[0], args[1], args[2])); break; + case INDEX_op_fence: + /* ??? Do we want SEQ_CST or ACQ_REL memory model. */ + tcg_out32(s, HWSYNC); + break; case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ case INDEX_op_mov_i64: case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ @@ -2586,6 +2593,7 @@ static const TCGTargetOpDef ppc_op_defs[] = { { INDEX_op_qemu_st_i64, { "S", "S", "S", "S" } }, #endif + { INDEX_op_fence, { } }, { -1 }, }; -- 2.5.5