From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33223) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b79gU-0005hY-0h for qemu-devel@nongnu.org; Sun, 29 May 2016 18:59:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b79gK-0004Tf-KM for qemu-devel@nongnu.org; Sun, 29 May 2016 18:59:49 -0400 Received: from mail.uni-paderborn.de ([131.234.142.9]:44277) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b79gK-0004TT-Du for qemu-devel@nongnu.org; Sun, 29 May 2016 18:59:40 -0400 Received: from tweenies.uni-paderborn.de ([131.234.189.21] helo=localhost.localdomain) by mail.uni-paderborn.de with esmtp (Exim 4.84_2 spheron) id 1b79gH-0006E0-Ii for qemu-devel@nongnu.org; Mon, 30 May 2016 00:59:37 +0200 Received: from mail.uni-paderborn.de by tweenies with queue id 1136309-4 for qemu-devel@nongnu.org; Sun, 29 May 2016 22:59:37 GMT From: peer.adelt@c-lab.de Date: Mon, 30 May 2016 00:59:27 +0200 Message-Id: <1464562768-8954-4-git-send-email-peer.adelt@c-lab.de> In-Reply-To: <1464562768-8954-1-git-send-email-peer.adelt@c-lab.de> References: <1464562768-8954-1-git-send-email-peer.adelt@c-lab.de> Subject: [Qemu-devel] [PATCH 3/4] target-tricore: Added new MOV instruction variant List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: kbastian@mail.uni-paderborn.de, Peer Adelt From: Peer Adelt Puts the content of data register D[a] into E[c][63:32] and the content of data register D[b] into E[c][31:0]. Signed-off-by: Peer Adelt --- target-tricore/translate.c | 4 ++++ target-tricore/tricore-opcodes.h | 1 + 2 files changed, 5 insertions(+) diff --git a/target-tricore/translate.c b/target-tricore/translate.c index e66b433..2145f64 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -6224,6 +6224,10 @@ static void decode_rr_accumulator(CPUTriCoreState *env, DisasContext *ctx) case OPC2_32_RR_MOV: tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r2]); break; + case OPC2_32_RR_MOV_EXT: + tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]); + tcg_gen_mov_tl(cpu_gpr_d[(r3 + 1)], cpu_gpr_d[r2]); + break; case OPC2_32_RR_NE: tcg_gen_setcond_tl(TCG_COND_NE, cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); diff --git a/target-tricore/tricore-opcodes.h b/target-tricore/tricore-opcodes.h index df666b0..2f25613 100644 --- a/target-tricore/tricore-opcodes.h +++ b/target-tricore/tricore-opcodes.h @@ -1062,6 +1062,7 @@ enum { OPC2_32_RR_MIN_H = 0x78, OPC2_32_RR_MIN_HU = 0x79, OPC2_32_RR_MOV = 0x1f, + OPC2_32_RR_MOV_EXT = 0x81, OPC2_32_RR_NE = 0x11, OPC2_32_RR_OR_EQ = 0x27, OPC2_32_RR_OR_GE = 0x2b, -- 2.7.4 (Apple Git-66)