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From: Michael Rolnik <mrolnik@gmail.com>
To: qemu-devel@nongnu.org
Cc: Michael Rolnik <rolnik@amazon.com>, Michael Rolnik <mrolnik@gmail.com>
Subject: [Qemu-devel] [PATCH 5/9] adding AVR interrupt handling
Date: Sun, 29 May 2016 18:23:04 -0700	[thread overview]
Message-ID: <1464571388-76699-5-git-send-email-rolnik@amazon.com> (raw)
In-Reply-To: <1464571388-76699-1-git-send-email-rolnik@amazon.com>

Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
---
 target-avr/helper.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 63 insertions(+), 1 deletion(-)

diff --git a/target-avr/helper.c b/target-avr/helper.c
index aec37af..ed22b37 100644
--- a/target-avr/helper.c
+++ b/target-avr/helper.c
@@ -33,12 +33,74 @@ bool                avr_cpu_exec_interrupt(
                                 CPUState               *cs,
                                 int                     interrupt_request)
 {
-    return  false;
+    CPUClass    *cc  = CPU_GET_CLASS(cs);
+    AVRCPU      *cpu = AVR_CPU(cs);
+    CPUAVRState *env = &cpu->env;
+
+    bool    ret = false;
+
+    if (interrupt_request & CPU_INTERRUPT_RESET) {
+        if (cpu_interrupts_enabled(env)) {
+            cs->exception_index = EXCP_RESET;
+            cc->do_interrupt(cs);
+
+            cs->interrupt_request   &= ~CPU_INTERRUPT_RESET;
+
+            ret = true;
+        }
+    }
+    if (interrupt_request & CPU_INTERRUPT_HARD) {
+        if (cpu_interrupts_enabled(env) && env->intsrc != 0) {
+            int     index   = __builtin_ffs(env->intsrc) - 1;
+            cs->exception_index = EXCP_INT(index);
+            cc->do_interrupt(cs);
+
+            env->intsrc             &= env->intsrc - 1; /* clear the interrupt */
+            cs->interrupt_request   &= ~CPU_INTERRUPT_HARD;
+
+            ret = true;
+        }
+    }
+    return ret;
 }
 
 void                avr_cpu_do_interrupt(
                                 CPUState           *cs)
 {
+    AVRCPU         *cpu = AVR_CPU(cs);
+    CPUAVRState    *env = &cpu->env;
+
+    uint32_t    ret     = env->pc;
+    int         vector;
+    int         size    = avr_feature(env, AVR_FEATURE_JMP_CALL) ? 2 : 1;
+    int         base    = 0;    /* TODO: where to get it */
+
+    if (cs->exception_index == EXCP_RESET) {
+        vector  = 0;
+    } else if (env->intsrc != 0) {
+        vector  = __builtin_ffs(env->intsrc);
+    }
+
+    if (avr_feature(env, AVR_FEATURE_3_BYTE_PC)) {
+        stb_phys(cs->as, env->sp--, (ret & 0x0000ff));
+        stb_phys(cs->as, env->sp--, (ret & 0x00ff00) >>  8);
+        stb_phys(cs->as, env->sp--, (ret & 0xff0000) >> 16);
+
+        env->pc = base + vector * size;
+    } else if (avr_feature(env, AVR_FEATURE_2_BYTE_PC)) {
+        stb_phys(cs->as, env->sp--, (ret & 0x0000ff));
+        stb_phys(cs->as, env->sp--, (ret & 0x00ff00) >>  8);
+
+        env->pc = base + vector * size;
+    } else {
+        stb_phys(cs->as, env->sp--, (ret & 0x0000ff));
+
+        env->pc = base + vector * size;
+    }
+
+    env->sregI  = 0;    /*  clear Global Interrupt Flag */
+
+    cs->exception_index = -1;
 }
 
 int                 avr_cpu_memory_rw_debug(
-- 
2.4.9 (Apple Git-60)

  parent reply	other threads:[~2016-05-30  1:23 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-30  1:23 [Qemu-devel] [PATCH 1/9] AVR cores support is added. 1. basic CPU structure 2. registers 3. no instructions Michael Rolnik
2016-05-30  1:23 ` [Qemu-devel] [PATCH 2/9] adding AVR CPU features/flavors Michael Rolnik
2016-05-30  1:23 ` [Qemu-devel] [PATCH 3/9] adding a sample AVR board Michael Rolnik
2016-05-30  1:23 ` [Qemu-devel] [PATCH 4/9] adding instructions encodings for LE and BE compilers Michael Rolnik
2016-06-02  6:32   ` Richard Henderson
2016-06-02  6:40     ` Michael Rolnik
2016-05-30  1:23 ` Michael Rolnik [this message]
2016-05-30  1:23 ` [Qemu-devel] [PATCH 6/9] adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions Michael Rolnik
2016-05-30  1:23 ` [Qemu-devel] [PATCH 7/9] adding instruction decoder Michael Rolnik
2016-05-30  1:23 ` [Qemu-devel] [PATCH 8/9] adding instruction translations Michael Rolnik
2016-06-02  6:44   ` Richard Henderson
2016-06-02  6:47     ` Michael Rolnik
2016-05-30  1:23 ` [Qemu-devel] [PATCH 9/9] updating gen_intermediate_code function to use prevously added decoder and translator Michael Rolnik
2016-06-02  6:39 ` [Qemu-devel] [PATCH 1/9] AVR cores support is added. 1. basic CPU structure 2. registers 3. no instructions Richard Henderson
2016-06-02  6:41   ` Michael Rolnik

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