From: Michael Rolnik <mrolnik@gmail.com>
To: qemu-devel@nongnu.org
Cc: Michael Rolnik <rolnik@amazon.com>, Michael Rolnik <mrolnik@gmail.com>
Subject: [Qemu-devel] [PATCH 6/9] adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions
Date: Sun, 29 May 2016 18:23:05 -0700 [thread overview]
Message-ID: <1464571388-76699-6-git-send-email-rolnik@amazon.com> (raw)
In-Reply-To: <1464571388-76699-1-git-send-email-rolnik@amazon.com>
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
---
target-avr/helper.c | 103 ++++++++++++++++++++++++++++++++++++++++++++++++++++
target-avr/helper.h | 5 +++
2 files changed, 108 insertions(+)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index ed22b37..450f598 100644
--- a/target-avr/helper.c
+++ b/target-avr/helper.c
@@ -155,6 +155,23 @@ void tlb_fill(
tlb_set_page_with_attrs(cs, vaddr, paddr, attrs, prot, mmu_idx, page_size);
}
+void helper_sleep(
+ CPUAVRState *env)
+{
+ CPUState *cs = CPU(avr_env_get_cpu(env));
+
+ cs->exception_index = EXCP_HLT;
+ cpu_loop_exit(cs);
+}
+void helper_unsupported(
+ CPUAVRState *env)
+{
+ CPUState *cs = CPU(avr_env_get_cpu(env));
+
+ cs->exception_index = EXCP_DEBUG;
+ cpu_dump_state(cs, stderr, fprintf, 0);
+ cpu_loop_exit(cs);
+}
void helper_debug(
CPUAVRState *env)
@@ -165,3 +182,89 @@ void helper_debug(
cpu_loop_exit(cs);
}
+void helper_wdr(
+ CPUAVRState *env)
+{
+ CPUState *cs = CPU(avr_env_get_cpu(env));
+
+ cs->exception_index = EXCP_DEBUG;
+ cpu_loop_exit(cs);
+}
+
+target_ulong helper_inb(
+ CPUAVRState *env,
+ uint32_t port)
+{
+ printf("in: io[%02x]\n", port);
+
+ switch (port) {
+ case 0x3b: {
+ return env->rampZ; /* RAMPZ */
+ }
+ case 0x3d: { /* SPL */
+ return env->sp & 0x00ff;
+ }
+ case 0x3e: { /* SPH */
+ return env->sp >> 8;
+ }
+ case 0x3f: { /* SREG */
+ uint8_t sreg;
+ sreg = (env->sregC & 0x01) << 0
+ | (env->sregZ & 0x01) << 1
+ | (env->sregN & 0x01) << 2
+ | (env->sregV & 0x01) << 3
+ | (env->sregS & 0x01) << 4
+ | (env->sregH & 0x01) << 5
+ | (env->sregT & 0x01) << 6
+ | (env->sregI & 0x01) << 7;
+ return sreg;
+ }
+ }
+ return 0;
+}
+
+void helper_outb(
+ CPUAVRState *env,
+ uint32_t port,
+ uint32_t data)
+{
+ printf("out:%02x -> io[%02x]\n", data, port);
+
+ data &= 0x000000ff;
+
+ switch (port) {
+ case 0x04: {
+ qemu_irq irq;
+ CPUState *cpu = CPU(avr_env_get_cpu(env));
+ irq = qdev_get_gpio_in(DEVICE(cpu), 3);
+ qemu_set_irq(irq, 1);
+ break;
+ }
+ case 0x3b: {
+ env->rampZ = data & 0x01; /* RAMPZ */
+ break;
+ }
+ case 0x3d: { /* SPL */
+ if (avr_feature(env, AVR_FEATURE_2_BYTE_SP)) {
+ env->sp = (env->sp & 0xff00) | (data);
+ }
+ break;
+ }
+ case 0x3e: { /* SPH */
+ env->sp = (env->sp & 0x00ff) | (data << 8);
+ break;
+ }
+ case 0x3f: { /* SREG */
+ env->sregC = (data >> 0) & 0x01;
+ env->sregZ = (data >> 1) & 0x01;
+ env->sregN = (data >> 2) & 0x01;
+ env->sregV = (data >> 3) & 0x01;
+ env->sregS = (data >> 4) & 0x01;
+ env->sregH = (data >> 5) & 0x01;
+ env->sregT = (data >> 6) & 0x01;
+ env->sregI = (data >> 7) & 0x01;
+ break;
+ }
+ }
+}
+
diff --git a/target-avr/helper.h b/target-avr/helper.h
index 017e076..5a08cfd 100644
--- a/target-avr/helper.h
+++ b/target-avr/helper.h
@@ -18,4 +18,9 @@
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
+DEF_HELPER_1(wdr, void, env)
DEF_HELPER_1(debug, void, env)
+DEF_HELPER_1(sleep, void, env)
+DEF_HELPER_1(unsupported, void, env)
+DEF_HELPER_3(outb, void, env, i32, i32)
+DEF_HELPER_2(inb, tl, env, i32)
--
2.4.9 (Apple Git-60)
next prev parent reply other threads:[~2016-05-30 1:23 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-30 1:23 [Qemu-devel] [PATCH 1/9] AVR cores support is added. 1. basic CPU structure 2. registers 3. no instructions Michael Rolnik
2016-05-30 1:23 ` [Qemu-devel] [PATCH 2/9] adding AVR CPU features/flavors Michael Rolnik
2016-05-30 1:23 ` [Qemu-devel] [PATCH 3/9] adding a sample AVR board Michael Rolnik
2016-05-30 1:23 ` [Qemu-devel] [PATCH 4/9] adding instructions encodings for LE and BE compilers Michael Rolnik
2016-06-02 6:32 ` Richard Henderson
2016-06-02 6:40 ` Michael Rolnik
2016-05-30 1:23 ` [Qemu-devel] [PATCH 5/9] adding AVR interrupt handling Michael Rolnik
2016-05-30 1:23 ` Michael Rolnik [this message]
2016-05-30 1:23 ` [Qemu-devel] [PATCH 7/9] adding instruction decoder Michael Rolnik
2016-05-30 1:23 ` [Qemu-devel] [PATCH 8/9] adding instruction translations Michael Rolnik
2016-06-02 6:44 ` Richard Henderson
2016-06-02 6:47 ` Michael Rolnik
2016-05-30 1:23 ` [Qemu-devel] [PATCH 9/9] updating gen_intermediate_code function to use prevously added decoder and translator Michael Rolnik
2016-06-02 6:39 ` [Qemu-devel] [PATCH 1/9] AVR cores support is added. 1. basic CPU structure 2. registers 3. no instructions Richard Henderson
2016-06-02 6:41 ` Michael Rolnik
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