From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50035) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7HKX-0008BG-Jq for qemu-devel@nongnu.org; Mon, 30 May 2016 03:09:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b7HKR-0001lw-1Y for qemu-devel@nongnu.org; Mon, 30 May 2016 03:09:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50353) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7HKQ-0001la-SN for qemu-devel@nongnu.org; Mon, 30 May 2016 03:09:34 -0400 From: Gerd Hoffmann Date: Mon, 30 May 2016 09:09:18 +0200 Message-Id: <1464592161-18348-2-git-send-email-kraxel@redhat.com> In-Reply-To: <1464592161-18348-1-git-send-email-kraxel@redhat.com> References: <1464592161-18348-1-git-send-email-kraxel@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 1/4] vmsvga: move fifo sanity checks to vmsvga_fifo_length List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: P J P , =?UTF-8?q?=E6=9D=8E=E5=BC=BA?= , Gerd Hoffmann Sanity checks are applied when the fifo is enabled by the guest (SVGA_REG_CONFIG_DONE write). Which doesn't help much if the guest changes the fifo registers afterwards. Move the checks to vmsvga_fifo_length so they are done each time qemu is about to read from the fifo. Fixes: CVE-2016-4454 Cc: P J P Reported-by: =E6=9D=8E=E5=BC=BA Signed-off-by: Gerd Hoffmann --- hw/display/vmware_vga.c | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index 0c63fa8..63a7c05 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -555,6 +555,21 @@ static inline int vmsvga_fifo_length(struct vmsvga_s= tate_s *s) if (!s->config || !s->enable) { return 0; } + + /* Check range and alignment. */ + if ((CMD(min) | CMD(max) | CMD(next_cmd) | CMD(stop)) & 3) { + return 0; + } + if (CMD(min) < (uint8_t *) s->cmd->fifo - (uint8_t *) s->fifo) { + return 0; + } + if (CMD(max) > SVGA_FIFO_SIZE) { + return 0; + } + if (CMD(max) < CMD(min) + 10 * 1024) { + return 0; + } + num =3D CMD(next_cmd) - CMD(stop); if (num < 0) { num +=3D CMD(max) - CMD(min); @@ -1005,19 +1020,6 @@ static void vmsvga_value_write(void *opaque, uint3= 2_t address, uint32_t value) case SVGA_REG_CONFIG_DONE: if (value) { s->fifo =3D (uint32_t *) s->fifo_ptr; - /* Check range and alignment. */ - if ((CMD(min) | CMD(max) | CMD(next_cmd) | CMD(stop)) & 3) { - break; - } - if (CMD(min) < (uint8_t *) s->cmd->fifo - (uint8_t *) s->fif= o) { - break; - } - if (CMD(max) > SVGA_FIFO_SIZE) { - break; - } - if (CMD(max) < CMD(min) + 10 * 1024) { - break; - } vga_dirty_log_stop(&s->vga); } s->config =3D !!value; --=20 1.8.3.1