From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org
Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
jasowang@redhat.com, marcel@redhat.com, mst@redhat.com,
pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com,
alex.williamson@redhat.com, wexu@redhat.com,
davidkiarie4@gmail.com, peterx@redhat.com
Subject: [Qemu-devel] [PATCH v8 22/25] kvm-irqchip: i386: add hook for add/remove virq
Date: Mon, 30 May 2016 18:31:35 +0800 [thread overview]
Message-ID: <1464604298-16739-23-git-send-email-peterx@redhat.com> (raw)
In-Reply-To: <1464604298-16739-1-git-send-email-peterx@redhat.com>
Adding two hooks to be notified when adding/removing msi routes. There
are two kinds of MSI routes:
- in kvm_irqchip_add_irq_route(): before assigning IRQFD. Used by
vhost, vfio, etc.
- in kvm_irqchip_send_msi(): when sending direct MSI message, if
direct MSI not allowed, we will first create one MSI route entry
in the kernel, then trigger it.
This patch only hooks the first one (irqfd case). We do not need to
take care for the 2nd one, since it's only used by QEMU userspace
(kvm-apic) and the messages will always do in-time translation when
triggered. While we need to note them down for the 1st one, so that we
can notify the kernel when cache invalidation happens.
Also, we do not hook IOAPIC msi routes (we have explicit notifier for
IOAPIC to keep its cache updated). We only need to care about irqfd
users.
Signed-off-by: Peter Xu <peterx@redhat.com>
---
include/sysemu/kvm.h | 6 ++++++
kvm-all.c | 2 ++
target-arm/kvm.c | 11 +++++++++++
target-i386/kvm.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
target-mips/kvm.c | 11 +++++++++++
target-ppc/kvm.c | 11 +++++++++++
target-s390x/kvm.c | 11 +++++++++++
trace-events | 2 ++
8 files changed, 102 insertions(+)
diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index 9144c6a..043bd12 100644
--- a/include/sysemu/kvm.h
+++ b/include/sysemu/kvm.h
@@ -358,6 +358,12 @@ void kvm_arch_init_irq_routing(KVMState *s);
int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
uint64_t address, uint32_t data, PCIDevice *dev);
+/* Notify arch about newly added MSI routes */
+int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
+ int vector, PCIDevice *dev);
+/* Notify arch about released MSI routes */
+int kvm_arch_release_virq_post(int virq);
+
int kvm_arch_msi_data_to_gsi(uint32_t data);
int kvm_set_irq(KVMState *s, int irq, int level);
diff --git a/kvm-all.c b/kvm-all.c
index 46190f7..a9eb366 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -1073,6 +1073,7 @@ void kvm_irqchip_release_virq(KVMState *s, int virq)
}
}
clear_gsi(s, virq);
+ kvm_arch_release_virq_post(virq);
}
static unsigned int kvm_hash_msi(uint32_t data)
@@ -1221,6 +1222,7 @@ int kvm_irqchip_add_msi_route(KVMState *s, int vector, PCIDevice *dev)
}
kvm_add_routing_entry(s, &kroute);
+ kvm_arch_add_msi_route_post(&kroute, vector, dev);
kvm_irqchip_commit_routes(s);
return virq;
diff --git a/target-arm/kvm.c b/target-arm/kvm.c
index 83da447..81d3e98 100644
--- a/target-arm/kvm.c
+++ b/target-arm/kvm.c
@@ -623,6 +623,17 @@ int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
return 0;
}
+int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
+ int vector, PCIDevice *dev)
+{
+ return 0;
+}
+
+int kvm_arch_release_virq_post(int virq)
+{
+ return 0;
+}
+
int kvm_arch_msi_data_to_gsi(uint32_t data)
{
return (data - 32) & 0xffff;
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 1f5b1d6..9051d16 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -3347,6 +3347,54 @@ int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
return 0;
}
+typedef struct MSIRouteEntry MSIRouteEntry;
+
+struct MSIRouteEntry {
+ PCIDevice *dev; /* Device pointer */
+ int vector; /* MSI/MSIX vector index */
+ int virq; /* Virtual IRQ index */
+ QLIST_ENTRY(MSIRouteEntry) list;
+};
+
+/* List of used GSI routes */
+static QLIST_HEAD(, MSIRouteEntry) msi_route_list = \
+ QLIST_HEAD_INITIALIZER(msi_route_list);
+
+int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
+ int vector, PCIDevice *dev)
+{
+ MSIRouteEntry *entry;
+
+ if (!dev) {
+ /* These are (possibly) IOAPIC routes only used for split
+ * kernel irqchip mode, while what we are housekeeping are
+ * PCI devices only. */
+ return 0;
+ }
+
+ entry = g_new0(MSIRouteEntry, 1);
+ entry->dev = dev;
+ entry->vector = vector;
+ entry->virq = route->gsi;
+ QLIST_INSERT_HEAD(&msi_route_list, entry, list);
+
+ trace_kvm_x86_add_msi_route(route->gsi);
+ return 0;
+}
+
+int kvm_arch_release_virq_post(int virq)
+{
+ MSIRouteEntry *entry, *next;
+ QLIST_FOREACH_SAFE(entry, &msi_route_list, list, next) {
+ if (entry->virq == virq) {
+ trace_kvm_x86_remove_msi_route(virq);
+ QLIST_REMOVE(entry, list);
+ break;
+ }
+ }
+ return 0;
+}
+
int kvm_arch_msi_data_to_gsi(uint32_t data)
{
abort();
diff --git a/target-mips/kvm.c b/target-mips/kvm.c
index a854e4d..7fc84d5 100644
--- a/target-mips/kvm.c
+++ b/target-mips/kvm.c
@@ -1044,6 +1044,17 @@ int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
return 0;
}
+int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
+ int vector, PCIDevice *dev)
+{
+ return 0;
+}
+
+int kvm_arch_release_virq_post(int virq)
+{
+ return 0;
+}
+
int kvm_arch_msi_data_to_gsi(uint32_t data)
{
abort();
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 24d6032..b4a165c 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -2566,6 +2566,17 @@ int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
return 0;
}
+int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
+ int vector, PCIDevice *dev)
+{
+ return 0;
+}
+
+int kvm_arch_release_virq_post(int virq)
+{
+ return 0;
+}
+
int kvm_arch_msi_data_to_gsi(uint32_t data)
{
return data & 0xffff;
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index 8f46fd0..9267963 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -2267,6 +2267,17 @@ int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
return 0;
}
+int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
+ int vector, PCIDevice *dev)
+{
+ return 0;
+}
+
+int kvm_arch_release_virq_post(int virq)
+{
+ return 0;
+}
+
int kvm_arch_msi_data_to_gsi(uint32_t data)
{
abort();
diff --git a/trace-events b/trace-events
index 54c0d41..6a423fd 100644
--- a/trace-events
+++ b/trace-events
@@ -1949,3 +1949,5 @@ gic_acknowledge_irq(int cpu, int irq) "cpu %d acknowledged irq %d"
# target-i386/kvm.c
kvm_x86_fixup_msi_error(uint32_t gsi) "VT-d failed to remap interrupt for GSI %" PRIu32
+kvm_x86_add_msi_route(int virq) "Adding route entry for virq %d"
+kvm_x86_remove_msi_route(int virq) "Removing route entry for virq %d"
--
2.4.11
next prev parent reply other threads:[~2016-05-30 10:33 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-30 10:31 [Qemu-devel] [PATCH v8 00/25] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 01/25] acpi: enable INTR for DMAR report structure Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 02/25] intel_iommu: allow queued invalidation for IR Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 03/25] intel_iommu: set IR bit for ECAP register Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 04/25] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-06-01 12:56 ` Igor Mammedov
2016-06-02 4:16 ` Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 05/25] intel_iommu: define interrupt remap table addr register Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 06/25] intel_iommu: handle interrupt remap enable Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 07/25] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 08/25] x86-iommu: introduce parent class Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 09/25] x86-iommu: provide x86_iommu_get_default Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 10/25] x86-iommu: q35: generalize find_add_as() Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 11/25] intel_iommu: add IR translation faults defines Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 12/25] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 13/25] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 14/25] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 15/25] intel_iommu: add support for split irqchip Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 16/25] q35: add "intremap" parameter to enable IR Peter Xu
2016-05-30 12:43 ` Jan Kiszka
2016-05-30 13:33 ` Peter Xu
2016-06-02 9:21 ` Marcel Apfelbaum
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 17/25] x86-iommu: introduce IEC notifiers Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 18/25] ioapic: register IOMMU IEC notifier for ioapic Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 19/25] intel_iommu: Add support for Extended Interrupt Mode Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 20/25] intel_iommu: add SID validation for IR Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 21/25] kvm-irqchip: simplify kvm_irqchip_add_msi_route Peter Xu
2016-05-30 10:31 ` Peter Xu [this message]
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 23/25] kvm-irqchip: x86: add msi route notify fn Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 24/25] kvm-irqchip: do explicit commit when update irq Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 25/25] intel_iommu: support all masks in interrupt entry cache invalidation Peter Xu
2016-05-30 10:38 ` [Qemu-devel] [PATCH v8 00/25] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
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