From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org
Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
jasowang@redhat.com, marcel@redhat.com, mst@redhat.com,
pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com,
alex.williamson@redhat.com, wexu@redhat.com,
davidkiarie4@gmail.com, peterx@redhat.com
Subject: [Qemu-devel] [PATCH v8 23/25] kvm-irqchip: x86: add msi route notify fn
Date: Mon, 30 May 2016 18:31:36 +0800 [thread overview]
Message-ID: <1464604298-16739-24-git-send-email-peterx@redhat.com> (raw)
In-Reply-To: <1464604298-16739-1-git-send-email-peterx@redhat.com>
One more IEC notifier is added to let msi routes know about the IEC
changes. When interrupt invalidation happens, all registered msi routes
will be updated for all PCI devices.
Since both vfio and vhost are possible gsi route consumers, this patch
will go one step further to keep them safe in split irqchip mode and
when irqfd is enabled.
Signed-off-by: Peter Xu <peterx@redhat.com>
---
hw/pci/pci.c | 15 +++++++++++++++
include/hw/pci/pci.h | 2 ++
kvm-all.c | 10 +---------
target-i386/kvm.c | 30 ++++++++++++++++++++++++++++++
trace-events | 1 +
5 files changed, 49 insertions(+), 9 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 7430715..ec1928f 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -2527,6 +2527,21 @@ uint16_t pci_requester_id(PCIDevice *dev)
return result;
}
+MSIMessage pci_get_msi_message(PCIDevice *dev, int vector)
+{
+ MSIMessage msg;
+ if (msix_enabled(dev)) {
+ msg = msix_get_message(dev, vector);
+ } else if (msi_enabled(dev)) {
+ msg = msi_get_message(dev, vector);
+ } else {
+ /* Should never happen */
+ error_report("%s: unknown interrupt type", __func__);
+ abort();
+ }
+ return msg;
+}
+
static const TypeInfo pci_device_type_info = {
.name = TYPE_PCI_DEVICE,
.parent = TYPE_DEVICE,
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 351266c..359c22e 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -779,4 +779,6 @@ extern const VMStateDescription vmstate_pci_device;
.offset = vmstate_offset_pointer(_state, _field, PCIDevice), \
}
+MSIMessage pci_get_msi_message(PCIDevice *dev, int vector);
+
#endif
diff --git a/kvm-all.c b/kvm-all.c
index a9eb366..f4ce357 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -1186,15 +1186,7 @@ int kvm_irqchip_add_msi_route(KVMState *s, int vector, PCIDevice *dev)
MSIMessage msg = {0, 0};
if (dev) {
- if (msix_enabled(dev)) {
- msg = msix_get_message(dev, vector);
- } else if (msi_enabled(dev)) {
- msg = msi_get_message(dev, vector);
- } else {
- /* Should never happen */
- error_report("%s: unknown interrupt type", __func__);
- abort();
- }
+ msg = pci_get_msi_message(dev, vector);
}
if (kvm_gsi_direct_mapping()) {
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 9051d16..173afd7 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -37,6 +37,7 @@
#include "hw/i386/apic_internal.h"
#include "hw/i386/apic-msidef.h"
#include "hw/i386/intel_iommu.h"
+#include "hw/i386/x86-iommu.h"
#include "exec/ioport.h"
#include "standard-headers/asm-x86/hyperv.h"
@@ -3360,9 +3361,26 @@ struct MSIRouteEntry {
static QLIST_HEAD(, MSIRouteEntry) msi_route_list = \
QLIST_HEAD_INITIALIZER(msi_route_list);
+static void kvm_update_msi_routes_all(void *private, bool global,
+ uint32_t index, uint32_t mask)
+{
+ int cnt = 0;
+ MSIRouteEntry *entry;
+ MSIMessage msg;
+ /* TODO: explicit route update */
+ QLIST_FOREACH(entry, &msi_route_list, list) {
+ cnt++;
+ msg = pci_get_msi_message(entry->dev, entry->vector);
+ kvm_irqchip_update_msi_route(kvm_state, entry->virq,
+ msg, entry->dev);
+ }
+ trace_kvm_x86_update_msi_routes(cnt);
+}
+
int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
int vector, PCIDevice *dev)
{
+ static bool notify_list_inited = false;
MSIRouteEntry *entry;
if (!dev) {
@@ -3379,6 +3397,18 @@ int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
QLIST_INSERT_HEAD(&msi_route_list, entry, list);
trace_kvm_x86_add_msi_route(route->gsi);
+
+ if (!notify_list_inited) {
+ /* For the first time we do add route, add ourselves into
+ * IOMMU's IEC notify list if needed. */
+ X86IOMMUState *iommu = x86_iommu_get_default();
+ if (iommu) {
+ x86_iommu_iec_register_notifier(iommu,
+ kvm_update_msi_routes_all,
+ NULL);
+ }
+ notify_list_inited = true;
+ }
return 0;
}
diff --git a/trace-events b/trace-events
index 6a423fd..8848fe2 100644
--- a/trace-events
+++ b/trace-events
@@ -1951,3 +1951,4 @@ gic_acknowledge_irq(int cpu, int irq) "cpu %d acknowledged irq %d"
kvm_x86_fixup_msi_error(uint32_t gsi) "VT-d failed to remap interrupt for GSI %" PRIu32
kvm_x86_add_msi_route(int virq) "Adding route entry for virq %d"
kvm_x86_remove_msi_route(int virq) "Removing route entry for virq %d"
+kvm_x86_update_msi_routes(int num) "Updated %d MSI routes"
--
2.4.11
next prev parent reply other threads:[~2016-05-30 10:33 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-30 10:31 [Qemu-devel] [PATCH v8 00/25] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 01/25] acpi: enable INTR for DMAR report structure Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 02/25] intel_iommu: allow queued invalidation for IR Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 03/25] intel_iommu: set IR bit for ECAP register Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 04/25] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-06-01 12:56 ` Igor Mammedov
2016-06-02 4:16 ` Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 05/25] intel_iommu: define interrupt remap table addr register Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 06/25] intel_iommu: handle interrupt remap enable Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 07/25] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 08/25] x86-iommu: introduce parent class Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 09/25] x86-iommu: provide x86_iommu_get_default Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 10/25] x86-iommu: q35: generalize find_add_as() Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 11/25] intel_iommu: add IR translation faults defines Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 12/25] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 13/25] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 14/25] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 15/25] intel_iommu: add support for split irqchip Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 16/25] q35: add "intremap" parameter to enable IR Peter Xu
2016-05-30 12:43 ` Jan Kiszka
2016-05-30 13:33 ` Peter Xu
2016-06-02 9:21 ` Marcel Apfelbaum
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 17/25] x86-iommu: introduce IEC notifiers Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 18/25] ioapic: register IOMMU IEC notifier for ioapic Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 19/25] intel_iommu: Add support for Extended Interrupt Mode Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 20/25] intel_iommu: add SID validation for IR Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 21/25] kvm-irqchip: simplify kvm_irqchip_add_msi_route Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 22/25] kvm-irqchip: i386: add hook for add/remove virq Peter Xu
2016-05-30 10:31 ` Peter Xu [this message]
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 24/25] kvm-irqchip: do explicit commit when update irq Peter Xu
2016-05-30 10:31 ` [Qemu-devel] [PATCH v8 25/25] intel_iommu: support all masks in interrupt entry cache invalidation Peter Xu
2016-05-30 10:38 ` [Qemu-devel] [PATCH v8 00/25] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
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