From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50373) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7cYE-00078z-K6 for qemu-devel@nongnu.org; Tue, 31 May 2016 01:49:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b7cYB-0000ed-DO for qemu-devel@nongnu.org; Tue, 31 May 2016 01:49:14 -0400 Received: from mail.uni-paderborn.de ([131.234.142.9]:48599) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7cYB-0000eY-6J for qemu-devel@nongnu.org; Tue, 31 May 2016 01:49:11 -0400 Received: from magmaria.uni-paderborn.de ([131.234.189.24] helo=localhost.localdomain) by mail.uni-paderborn.de with esmtp (Exim 4.84_2 amazonia) id 1b7cYA-00013B-7X for qemu-devel@nongnu.org; Tue, 31 May 2016 07:49:10 +0200 Received: from mail.uni-paderborn.de by magmaria with queue id 1139031-3 for qemu-devel@nongnu.org; Tue, 31 May 2016 05:49:10 GMT From: peer.adelt@c-lab.de Date: Tue, 31 May 2016 07:49:05 +0200 Message-Id: <1464673745-14628-1-git-send-email-peer.adelt@c-lab.de> Subject: [Qemu-devel] [PATCH v2 4/4] target-tricore: Added new JNE instruction variant List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: kbastian@mail.uni-paderborn.de, Peer Adelt From: Peer Adelt If D[15] is != sign_ext(const4) then PC will be set to (PC + zero_ext(disp4 + 16)). Signed-off-by: Peer Adelt --- target-tricore/translate.c | 11 +++++++++++ target-tricore/tricore-opcodes.h | 1 + 2 files changed, 12 insertions(+) diff --git a/target-tricore/translate.c b/target-tricore/translate.c index 960ee33..21732f8 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -3363,6 +3363,7 @@ static void gen_compute_branch(DisasContext *ctx, uint32_t opc, int r1, gen_branch_condi(ctx, TCG_COND_EQ, cpu_gpr_d[15], constant, offset); break; case OPC1_16_SBC_JNE: + case OPC1_16_SBC_JNE16: gen_branch_condi(ctx, TCG_COND_NE, cpu_gpr_d[15], constant, offset); break; /* SBRN-format jumps */ @@ -4097,6 +4098,16 @@ static void decode_16Bit_opc(CPUTriCoreState *env, DisasContext *ctx) const16 = MASK_OP_SBC_CONST4_SEXT(ctx->opcode); gen_compute_branch(ctx, op1, 0, 0, const16, address); break; + case OPC1_16_SBC_JEQ16: + case OPC1_16_SBC_JNE16: + if (tricore_feature(env, TRICORE_FEATURE_16)) { + address = MASK_OP_SBC_DISP4(ctx->opcode); + const16 = MASK_OP_SBC_CONST4_SEXT(ctx->opcode); + gen_compute_branch(ctx, op1, 0, 0, const16, address + 16); + } else { + generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); + } + break; /* SBRN-format */ case OPC1_16_SBRN_JNZ_T: case OPC1_16_SBRN_JZ_T: diff --git a/target-tricore/tricore-opcodes.h b/target-tricore/tricore-opcodes.h index 2f25613..7925354 100644 --- a/target-tricore/tricore-opcodes.h +++ b/target-tricore/tricore-opcodes.h @@ -318,6 +318,7 @@ enum { OPC1_16_SBR_JLEZ = 0x8e, OPC1_16_SBR_JLTZ = 0x0e, OPC1_16_SBC_JNE = 0x5e, + OPC1_16_SBC_JNE16 = 0xde, OPC1_16_SBR_JNE = 0x7e, OPC1_16_SB_JNZ = 0xee, OPC1_16_SBR_JNZ = 0xf6, -- 2.7.4