From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47610) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b8MS4-0004a4-LV for qemu-devel@nongnu.org; Thu, 02 Jun 2016 02:49:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b8MRz-0005aE-Pe for qemu-devel@nongnu.org; Thu, 02 Jun 2016 02:49:56 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59511) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b8MRz-0005Zi-Jj for qemu-devel@nongnu.org; Thu, 02 Jun 2016 02:49:51 -0400 From: Jason Wang Date: Thu, 2 Jun 2016 14:48:16 +0800 Message-Id: <1464850102-17829-26-git-send-email-jasowang@redhat.com> In-Reply-To: <1464850102-17829-1-git-send-email-jasowang@redhat.com> References: <1464850102-17829-1-git-send-email-jasowang@redhat.com> Subject: [Qemu-devel] [PULL V4 25/31] i.MX: Fix FEC code for MDIO address selection List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org, qemu-devel@nongnu.org Cc: Jean-Christophe Dubois , Jason Wang From: Jean-Christophe Dubois According to the FEC chapter of i.MX25 reference manual When writing to MMFR register, the MDIO device and adress are selected by bit 27 to 23 and bit 22 to 18 respectively. This is a total of 10 bits that need to be used by the Phy chip/address decoding function. This patch fixes the number of bits used from 9 to 10. Signed-off-by: Jean-Christophe Dubois Signed-off-by: Jason Wang --- hw/net/imx_fec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c index fce3661..bf68ce6 100644 --- a/hw/net/imx_fec.c +++ b/hw/net/imx_fec.c @@ -460,9 +460,9 @@ static void imx_fec_write(void *opaque, hwaddr addr, /* store the value */ s->mmfr = value; if (extract32(value, 29, 1)) { - s->mmfr = do_phy_read(s, extract32(value, 18, 9)); + s->mmfr = do_phy_read(s, extract32(value, 18, 10)); } else { - do_phy_write(s, extract32(value, 18, 9), extract32(value, 0, 16)); + do_phy_write(s, extract32(value, 18, 10), extract32(value, 0, 16)); } /* raise the interrupt as the PHY operation is done */ s->eir |= FEC_INT_MII; -- 2.7.4