From: "Cédric Le Goater" <clg@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
Cedric Le Goater <clg@kaod.org>
Subject: [Qemu-devel] [PATCH 3/3] ppc: fix hrfid, tlbia and slbia privilege
Date: Fri, 3 Jun 2016 14:11:20 +0200 [thread overview]
Message-ID: <1464955880-10176-4-git-send-email-clg@kaod.org> (raw)
In-Reply-To: <1464955880-10176-1-git-send-email-clg@kaod.org>
commit 74693da98894 ('ppc: tlbie, tlbia and tlbisync are HV only')
introduced some extra checks on the instruction privilege. slbia was
changed wrongly and hrfid, tlbia were forgotten.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target-ppc/translate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index ad262523abca..776343170a53 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -4108,7 +4108,7 @@ static void gen_hrfid(DisasContext *ctx)
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
#else
/* Restore CPU state */
- if (unlikely(!ctx->hv)) {
+ if (unlikely(ctx->pr || !ctx->hv)) {
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
return;
}
@@ -4845,7 +4845,7 @@ static void gen_tlbia(DisasContext *ctx)
#if defined(CONFIG_USER_ONLY)
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
#else
- if (unlikely(ctx->pr)) {
+ if (unlikely(ctx->pr || !ctx->hv)) {
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
return;
}
@@ -4913,7 +4913,7 @@ static void gen_slbia(DisasContext *ctx)
#if defined(CONFIG_USER_ONLY)
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
#else
- if (unlikely(ctx->pr || !ctx->hv)) {
+ if (unlikely(ctx->pr)) {
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
return;
}
--
2.1.4
next prev parent reply other threads:[~2016-06-03 12:13 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-03 12:11 [Qemu-devel] [PATCH 0/3] ppc: complete the new HV mode Cédric Le Goater
2016-06-03 12:11 ` [Qemu-devel] [PATCH 1/3] ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV Cédric Le Goater
2016-06-03 12:11 ` [Qemu-devel] [PATCH 2/3] ppc: Better figure out if processor has HV mode Cédric Le Goater
2016-06-03 12:11 ` Cédric Le Goater [this message]
2016-06-04 8:24 ` [Qemu-devel] [PATCH 3/3] ppc: fix hrfid, tlbia and slbia privilege Thomas Huth
2016-06-06 1:10 ` David Gibson
2016-06-03 13:52 ` [Qemu-devel] [PATCH 0/3] ppc: complete the new HV mode Mark Cave-Ayland
2016-06-03 14:00 ` Cédric Le Goater
2016-06-03 14:06 ` Mark Cave-Ayland
2016-06-03 14:06 ` Cedric Le Goater
2016-06-03 14:14 ` Mark Cave-Ayland
2016-06-03 15:47 ` Mark Cave-Ayland
2016-06-03 17:54 ` Cédric Le Goater
2016-06-05 17:41 ` Cédric Le Goater
2016-06-05 22:26 ` Mark Cave-Ayland
2016-06-06 6:27 ` Cédric Le Goater
2016-06-06 6:30 ` Cedric Le Goater
2016-06-06 6:38 ` Mark Cave-Ayland
2016-06-07 7:04 ` Cédric Le Goater
2016-06-07 8:24 ` Mark Cave-Ayland
2016-06-06 1:47 ` David Gibson
2016-06-06 4:17 ` [Qemu-devel] [Qemu-ppc] " Benjamin Herrenschmidt
2016-06-06 7:28 ` Cédric Le Goater
2016-06-06 1:17 ` [Qemu-devel] " David Gibson
2016-06-06 3:55 ` Benjamin Herrenschmidt
2016-06-06 4:20 ` [Qemu-devel] [Qemu-ppc] " Benjamin Herrenschmidt
2016-06-06 6:29 ` Mark Cave-Ayland
2016-06-06 7:04 ` Benjamin Herrenschmidt
2016-06-06 7:06 ` Benjamin Herrenschmidt
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