From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 23/28] hw/char: QOM'ify digic-uart model
Date: Mon, 6 Jun 2016 15:47:40 +0100 [thread overview]
Message-ID: <1465224465-21998-24-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1465224465-21998-1-git-send-email-peter.maydell@linaro.org>
From: xiaoqiang zhao <zxq_yx_007@163.com>
* drop qemu_char_get_next_serial and use chardev prop
* change affected board code to use the new way
Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Message-id: 1465028065-5855-4-git-send-email-zxq_yx_007@163.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/digic.c | 2 ++
hw/char/digic-uart.c | 10 ++++++----
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/arm/digic.c b/hw/arm/digic.c
index e0f9730..d60ea39 100644
--- a/hw/arm/digic.c
+++ b/hw/arm/digic.c
@@ -23,6 +23,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/arm/digic.h"
+#include "sysemu/sysemu.h"
#define DIGIC4_TIMER_BASE(n) (0xc0210000 + (n) * 0x100)
@@ -84,6 +85,7 @@ static void digic_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(sbd, 0, DIGIC4_TIMER_BASE(i));
}
+ qdev_prop_set_chr(DEVICE(&s->uart), "chardev", serial_hds[0]);
object_property_set_bool(OBJECT(&s->uart), true, "realized", &err);
if (err != NULL) {
error_propagate(errp, err);
diff --git a/hw/char/digic-uart.c b/hw/char/digic-uart.c
index 0e44878..c7604e6 100644
--- a/hw/char/digic-uart.c
+++ b/hw/char/digic-uart.c
@@ -145,8 +145,6 @@ static void digic_uart_realize(DeviceState *dev, Error **errp)
{
DigicUartState *s = DIGIC_UART(dev);
- /* FIXME use a qdev chardev prop instead of qemu_char_get_next_serial() */
- s->chr = qemu_char_get_next_serial();
if (s->chr) {
qemu_chr_add_handlers(s->chr, uart_can_rx, uart_rx, uart_event, s);
}
@@ -172,6 +170,11 @@ static const VMStateDescription vmstate_digic_uart = {
}
};
+static Property digic_uart_properties[] = {
+ DEFINE_PROP_CHR("chardev", DigicUartState, chr),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void digic_uart_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -179,8 +182,7 @@ static void digic_uart_class_init(ObjectClass *klass, void *data)
dc->realize = digic_uart_realize;
dc->reset = digic_uart_reset;
dc->vmsd = &vmstate_digic_uart;
- /* Reason: realize() method uses qemu_char_get_next_serial() */
- dc->cannot_instantiate_with_device_add_yet = true;
+ dc->props = digic_uart_properties;
}
static const TypeInfo digic_uart_info = {
--
1.9.1
next prev parent reply other threads:[~2016-06-06 14:48 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-06 14:47 [Qemu-devel] [PULL 00/28] target-arm queue Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 01/28] target-arm: Add the HSTR_EL2 register Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 02/28] target-arm: A64: Create Instruction Syndromes for Data Aborts Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 03/28] target-arm: Set IL bit in syndromes for insn abort, watchpoint, swstep Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 04/28] target-arm: Don't try to set ESR IL bit in arm_cpu_do_interrupt_aarch64() Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 05/28] hw/arm/virt: fix limit of 64-bit ACPI/ECAM PCI MMIO range Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 06/28] target-arm: kvm64: set guest PMUv3 feature bit if supported Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 07/28] hw/arm/virt: Add PMU node for virt machine Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 08/28] hw/arm/virt-acpi-build: Add PMU IRQ number in ACPI table Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 09/28] hw/intc/gic: RAZ/WI non-sec access to sec interrupts Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 10/28] i2c: add aspeed i2c controller Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 11/28] hw/arm/virt: Reject gic-version=host for non-KVM Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 12/28] xlnx-zynqmp: Add a secure prop to en/disable ARM Security Extensions Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 13/28] xlnx-zynqmp: Make the RPU subsystem optional Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 14/28] xlnx-zynqmp: Delay realization of GIC until post CPU realization Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 15/28] xlnx-zynqmp: Use the in kernel GIC model for KVM runs Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 16/28] hw/ptimer: Fix issues caused by the adjusted timer limit value Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 17/28] hw/ptimer: Perform counter wrap around if timer already expired Peter Maydell
2016-06-24 15:58 ` Mark Cave-Ayland
2016-06-24 16:02 ` Peter Maydell
2016-06-24 18:19 ` Dmitry Osipenko
2016-06-24 18:37 ` Mark Cave-Ayland
2016-06-24 20:10 ` Dmitry Osipenko
2016-06-06 14:47 ` [Qemu-devel] [PULL 18/28] hw/ptimer: Update .delta on period/freq change Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 19/28] hw/ptimer: Support "on the fly" timer mode switch Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 20/28] hw/ptimer: Introduce ptimer_get_limit Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 21/28] hw/char: QOM'ify pl011 model Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 22/28] hw/char: QOM'ify cadence_uart model Peter Maydell
2016-06-06 14:47 ` Peter Maydell [this message]
2016-06-06 14:47 ` [Qemu-devel] [PULL 24/28] hw/char: QOM'ify stm32f2xx_usart model Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 25/28] hw/char: QOM'ify xilinx_uartlite model Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 26/28] char: get rid of qemu_char_get_next_serial Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 27/28] target-arm: Fix TTBR selecting logic on AArch32 Stage 2 translation Peter Maydell
2016-06-06 14:47 ` [Qemu-devel] [PULL 28/28] zynqmp: Add the ZCU102 board Peter Maydell
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