From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37917) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b9vou-00007h-Mh for qemu-devel@nongnu.org; Mon, 06 Jun 2016 10:48:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b9vor-0000VJ-Sw for qemu-devel@nongnu.org; Mon, 06 Jun 2016 10:47:59 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:57506) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b9vor-0000Sb-Gh for qemu-devel@nongnu.org; Mon, 06 Jun 2016 10:47:57 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1b9voh-0008Bs-IC for qemu-devel@nongnu.org; Mon, 06 Jun 2016 15:47:47 +0100 From: Peter Maydell Date: Mon, 6 Jun 2016 15:47:20 +0100 Message-Id: <1465224465-21998-4-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1465224465-21998-1-git-send-email-peter.maydell@linaro.org> References: <1465224465-21998-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 03/28] target-arm: Set IL bit in syndromes for insn abort, watchpoint, swstep List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org For some exception syndrome types, the IL bit should always be set. This includes the instruction abort, watchpoint and software step syndrome types; add the missing ARM_EL_IL bit to the syndrome values returned by syn_insn_abort(), syn_swstep() and syn_watchpoint(). Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Message-id: 1463487258-27468-2-git-send-email-peter.maydell@linaro.org --- target-arm/internals.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target-arm/internals.h b/target-arm/internals.h index a125873..728ecba 100644 --- a/target-arm/internals.h +++ b/target-arm/internals.h @@ -367,7 +367,7 @@ static inline uint32_t syn_fp_access_trap(int cv, int cond, bool is_16bit) static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc) { return (EC_INSNABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | (ea << 9) | (s1ptw << 7) | fsc; + | ARM_EL_IL | (ea << 9) | (s1ptw << 7) | fsc; } static inline uint32_t syn_data_abort_no_iss(int same_el, @@ -396,13 +396,13 @@ static inline uint32_t syn_data_abort_with_iss(int same_el, static inline uint32_t syn_swstep(int same_el, int isv, int ex) { return (EC_SOFTWARESTEP << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | (isv << 24) | (ex << 6) | 0x22; + | ARM_EL_IL | (isv << 24) | (ex << 6) | 0x22; } static inline uint32_t syn_watchpoint(int same_el, int cm, int wnr) { return (EC_WATCHPOINT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | (cm << 8) | (wnr << 6) | 0x22; + | ARM_EL_IL | (cm << 8) | (wnr << 6) | 0x22; } static inline uint32_t syn_breakpoint(int same_el) -- 1.9.1