From: Thomas Huth <thuth@redhat.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au
Cc: agraf@suse.de, qemu-devel@nongnu.org,
Alexey Kardashevskiy <aik@ozlabs.ru>
Subject: [Qemu-devel] [PATCH 5/5] ppc: Add PowerISA 2.07 compatibility mode
Date: Tue, 7 Jun 2016 17:39:40 +0200 [thread overview]
Message-ID: <1465313980-31281-6-git-send-email-thuth@redhat.com> (raw)
In-Reply-To: <1465313980-31281-1-git-send-email-thuth@redhat.com>
Make sure that guests can use the PowerISA 2.07 CPU sPAPR
compatibility mode when they request it and the target CPU
supports it.
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
hw/ppc/spapr_hcall.c | 6 ++++--
target-ppc/translate_init.c | 3 +++
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index cc16249..2ba5cbd 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -927,7 +927,7 @@ static void cas_handle_compat_cpu(PowerPCCPUClass *pcc, uint32_t pvr,
unsigned *cpu_version)
{
unsigned lvl = get_compat_level(pvr);
- bool is205, is206;
+ bool is205, is206, is207;
if (!lvl) {
return;
@@ -939,8 +939,10 @@ static void cas_handle_compat_cpu(PowerPCCPUClass *pcc, uint32_t pvr,
is206 = (pcc->pcr_supported & PCR_COMPAT_2_06) &&
((lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06)) ||
(lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06_PLUS)));
+ is207 = (pcc->pcr_supported & PCR_COMPAT_2_07) &&
+ (lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_07));
- if (is205 || is206) {
+ if (is205 || is206 || is207) {
if (!max_lvl) {
/* User did not set the level, choose the highest */
if (*compat_lvl <= lvl) {
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index ee2bc14..46fa375 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -9532,6 +9532,9 @@ void ppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version, Error **errp)
case CPU_POWERPC_LOGICAL_2_06_PLUS:
env->spr[SPR_PCR] = PCR_TM_DIS | PCR_COMPAT_2_07 | PCR_COMPAT_2_06;
break;
+ case CPU_POWERPC_LOGICAL_2_07:
+ env->spr[SPR_PCR] = PCR_COMPAT_2_07;
+ break;
default:
env->spr[SPR_PCR] = 0;
break;
--
1.8.3.1
next prev parent reply other threads:[~2016-06-07 15:40 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-07 15:39 [Qemu-devel] [PATCH 0/5] ppc: Improve sPAPR CPU compatibility mode settings Thomas Huth
2016-06-07 15:39 ` [Qemu-devel] [PATCH 1/5] ppc/spapr: Refactor h_client_architecture_support() CPU parsing code Thomas Huth
2016-06-08 0:33 ` Michael Roth
2016-06-07 15:39 ` [Qemu-devel] [PATCH 2/5] ppc: Split pcr_mask settings into supported bits and the register mask Thomas Huth
2016-06-08 0:34 ` Michael Roth
2016-06-07 15:39 ` [Qemu-devel] [PATCH 3/5] ppc: Provide function to get CPU class of the host CPU Thomas Huth
2016-06-08 0:38 ` Michael Roth
2016-06-07 15:39 ` [Qemu-devel] [PATCH 4/5] ppc: Improve PCR bit selection in ppc_set_compat() Thomas Huth
2016-06-08 1:12 ` David Gibson
2016-06-08 6:47 ` Thomas Huth
2016-06-08 5:44 ` [Qemu-devel] [Qemu-ppc] " David Gibson
2016-06-08 6:59 ` Thomas Huth
2016-06-08 7:24 ` David Gibson
2016-06-08 7:37 ` Thomas Huth
2016-06-07 15:39 ` Thomas Huth [this message]
2016-06-08 1:11 ` [Qemu-devel] [PATCH 0/5] ppc: Improve sPAPR CPU compatibility mode settings David Gibson
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