From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org
Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
jasowang@redhat.com, marcel@redhat.com, mst@redhat.com,
pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com,
alex.williamson@redhat.com, wexu@redhat.com,
davidkiarie4@gmail.com, peterx@redhat.com
Subject: [Qemu-devel] [PATCH v9 05/25] acpi: enable INTR for DMAR report structure
Date: Mon, 13 Jun 2016 21:09:21 +0800 [thread overview]
Message-ID: <1465823381-23602-6-git-send-email-peterx@redhat.com> (raw)
In-Reply-To: <1465823381-23602-1-git-send-email-peterx@redhat.com>
In ACPI DMA remapping report structure, enable INTR flag when specified.
Signed-off-by: Peter Xu <peterx@redhat.com>
---
hw/i386/acpi-build.c | 11 ++++++++++-
include/hw/i386/intel_iommu.h | 2 ++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 161f089..961ccd6a 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -57,6 +57,7 @@
#include "qapi/qmp/qint.h"
#include "qom/qom-qobject.h"
+#include "hw/i386/x86-iommu.h"
/* These are used to size the ACPI tables for -M pc-i440fx-1.7 and
* -M pc-i440fx-2.0. Even if the actual amount of AML generated grows
@@ -2422,10 +2423,18 @@ build_dmar_q35(GArray *table_data, BIOSLinker *linker)
AcpiTableDmar *dmar;
AcpiDmarHardwareUnit *drhd;
+ uint8_t dmar_flags = 0;
+ X86IOMMUState *iommu = x86_iommu_get_default();
+
+ assert(iommu);
+ if (iommu->intr_supported) {
+ /* enable INTR for the IOMMU device */
+ dmar_flags |= DMAR_REPORT_F_INTR;
+ }
dmar = acpi_data_push(table_data, sizeof(*dmar));
dmar->host_address_width = VTD_HOST_ADDRESS_WIDTH - 1;
- dmar->flags = 0; /* No intr_remap for now */
+ dmar->flags = dmar_flags;
/* DMAR Remapping Hardware Unit Definition structure */
drhd = acpi_data_push(table_data, sizeof(*drhd));
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index e36b896..638d77f 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -44,6 +44,8 @@
#define VTD_HOST_ADDRESS_WIDTH 39
#define VTD_HAW_MASK ((1ULL << VTD_HOST_ADDRESS_WIDTH) - 1)
+#define DMAR_REPORT_F_INTR (1)
+
typedef struct VTDContextEntry VTDContextEntry;
typedef struct VTDContextCacheEntry VTDContextCacheEntry;
typedef struct IntelIOMMUState IntelIOMMUState;
--
2.4.11
next prev parent reply other threads:[~2016-06-13 13:10 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-13 13:09 [Qemu-devel] [PATCH v9 00/25] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 01/25] x86-iommu: introduce parent class Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 02/25] x86-iommu: provide x86_iommu_get_default Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 03/25] x86-iommu: q35: generalize find_add_as() Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 04/25] x86-iommu: introduce "intremap" property Peter Xu
2016-06-13 13:09 ` Peter Xu [this message]
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 06/25] intel_iommu: allow queued invalidation for IR Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 07/25] intel_iommu: set IR bit for ECAP register Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 08/25] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 09/25] intel_iommu: define interrupt remap table addr register Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 10/25] intel_iommu: handle interrupt remap enable Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 11/25] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 12/25] intel_iommu: add IR translation faults defines Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 13/25] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 14/25] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 15/25] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 16/25] intel_iommu: add support for split irqchip Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 17/25] x86-iommu: introduce IEC notifiers Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 18/25] ioapic: register IOMMU IEC notifier for ioapic Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 19/25] intel_iommu: Add support for Extended Interrupt Mode Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 20/25] intel_iommu: add SID validation for IR Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 21/25] kvm-irqchip: simplify kvm_irqchip_add_msi_route Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 22/25] kvm-irqchip: i386: add hook for add/remove virq Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 23/25] kvm-irqchip: x86: add msi route notify fn Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 24/25] kvm-irqchip: do explicit commit when update irq Peter Xu
2016-06-13 13:09 ` [Qemu-devel] [PATCH v9 25/25] intel_iommu: support all masks in interrupt entry cache invalidation Peter Xu
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