From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 02/30] hw/arm/virt: Add PMU node for virt machine
Date: Tue, 14 Jun 2016 15:13:37 +0100 [thread overview]
Message-ID: <1465913645-19346-3-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1465913645-19346-1-git-send-email-peter.maydell@linaro.org>
From: Shannon Zhao <shannon.zhao@linaro.org>
Add a virtual PMU device for virt machine while use PPI 7 for PMU
overflow interrupt number.
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Message-id: 1465267577-1808-3-git-send-email-zhaoshenglong@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/virt.c | 33 +++++++++++++++++++++++++++++++++
include/hw/arm/virt.h | 4 ++++
target-arm/kvm32.c | 6 ++++++
target-arm/kvm64.c | 41 +++++++++++++++++++++++++++++++++++++++++
target-arm/kvm_arm.h | 7 +++++++
5 files changed, 91 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 73113cf..0f830a3 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -436,6 +436,37 @@ static void fdt_add_gic_node(VirtBoardInfo *vbi, int type)
qemu_fdt_setprop_cell(vbi->fdt, "/intc", "phandle", vbi->gic_phandle);
}
+static void fdt_add_pmu_nodes(const VirtBoardInfo *vbi, int gictype)
+{
+ CPUState *cpu;
+ ARMCPU *armcpu;
+ uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI;
+
+ CPU_FOREACH(cpu) {
+ armcpu = ARM_CPU(cpu);
+ if (!armcpu->has_pmu ||
+ !kvm_arm_pmu_create(cpu, PPI(VIRTUAL_PMU_IRQ))) {
+ return;
+ }
+ }
+
+ if (gictype == 2) {
+ irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START,
+ GIC_FDT_IRQ_PPI_CPU_WIDTH,
+ (1 << vbi->smp_cpus) - 1);
+ }
+
+ armcpu = ARM_CPU(qemu_get_cpu(0));
+ qemu_fdt_add_subnode(vbi->fdt, "/pmu");
+ if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) {
+ const char compat[] = "arm,armv8-pmuv3";
+ qemu_fdt_setprop(vbi->fdt, "/pmu", "compatible",
+ compat, sizeof(compat));
+ qemu_fdt_setprop_cells(vbi->fdt, "/pmu", "interrupts",
+ GIC_FDT_IRQ_TYPE_PPI, VIRTUAL_PMU_IRQ, irqflags);
+ }
+}
+
static void create_v2m(VirtBoardInfo *vbi, qemu_irq *pic)
{
int i;
@@ -1259,6 +1290,8 @@ static void machvirt_init(MachineState *machine)
create_gic(vbi, pic, gic_version, vms->secure);
+ fdt_add_pmu_nodes(vbi, gic_version);
+
create_uart(vbi, pic, VIRT_UART, sysmem, serial_hds[0]);
if (vms->secure) {
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 82703d2..9650193 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -41,6 +41,10 @@
#define ARCH_TIMER_NS_EL1_IRQ 14
#define ARCH_TIMER_NS_EL2_IRQ 10
+#define VIRTUAL_PMU_IRQ 7
+
+#define PPI(irq) ((irq) + 16)
+
enum {
VIRT_FLASH,
VIRT_MEM,
diff --git a/target-arm/kvm32.c b/target-arm/kvm32.c
index c03e3e5..c35c676 100644
--- a/target-arm/kvm32.c
+++ b/target-arm/kvm32.c
@@ -522,3 +522,9 @@ bool kvm_arm_hw_debug_active(CPUState *cs)
{
return false;
}
+
+int kvm_arm_pmu_create(CPUState *cs, int irq)
+{
+ qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
+ return 0;
+}
diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
index 75383c8..2d6a310 100644
--- a/target-arm/kvm64.c
+++ b/target-arm/kvm64.c
@@ -382,6 +382,47 @@ static CPUWatchpoint *find_hw_watchpoint(CPUState *cpu, target_ulong addr)
return NULL;
}
+static bool kvm_arm_pmu_support_ctrl(CPUState *cs, struct kvm_device_attr *attr)
+{
+ return kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr) == 0;
+}
+
+int kvm_arm_pmu_create(CPUState *cs, int irq)
+{
+ int err;
+
+ struct kvm_device_attr attr = {
+ .group = KVM_ARM_VCPU_PMU_V3_CTRL,
+ .addr = (intptr_t)&irq,
+ .attr = KVM_ARM_VCPU_PMU_V3_IRQ,
+ .flags = 0,
+ };
+
+ if (!kvm_arm_pmu_support_ctrl(cs, &attr)) {
+ return 0;
+ }
+
+ err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, &attr);
+ if (err < 0) {
+ fprintf(stderr, "KVM_SET_DEVICE_ATTR failed: %s\n",
+ strerror(-err));
+ abort();
+ }
+
+ attr.group = KVM_ARM_VCPU_PMU_V3_CTRL;
+ attr.attr = KVM_ARM_VCPU_PMU_V3_INIT;
+ attr.addr = 0;
+ attr.flags = 0;
+
+ err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, &attr);
+ if (err < 0) {
+ fprintf(stderr, "KVM_SET_DEVICE_ATTR failed: %s\n",
+ strerror(-err));
+ abort();
+ }
+
+ return 1;
+}
static inline void set_feature(uint64_t *features, int feature)
{
diff --git a/target-arm/kvm_arm.h b/target-arm/kvm_arm.h
index 345233c..a419368 100644
--- a/target-arm/kvm_arm.h
+++ b/target-arm/kvm_arm.h
@@ -194,6 +194,8 @@ int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu);
int kvm_arm_vgic_probe(void);
+int kvm_arm_pmu_create(CPUState *cs, int irq);
+
#else
static inline int kvm_arm_vgic_probe(void)
@@ -201,6 +203,11 @@ static inline int kvm_arm_vgic_probe(void)
return 0;
}
+static inline int kvm_arm_pmu_create(CPUState *cs, int irq)
+{
+ return 0;
+}
+
#endif
static inline const char *gic_class_name(void)
--
1.9.1
next prev parent reply other threads:[~2016-06-14 14:14 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-14 14:13 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 01/30] target-arm: kvm64: set guest PMUv3 feature bit if supported Peter Maydell
2016-06-14 14:13 ` Peter Maydell [this message]
2016-06-14 14:13 ` [Qemu-devel] [PULL 03/30] hw/arm/virt-acpi-build: Add PMU IRQ number in ACPI table Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 04/30] target-arm: Fix reset and migration of TTBCR(S) Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 05/30] hw/arm/virt: separate versioned type-init code Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 06/30] hw/arm/virt: introduce DEFINE_VIRT_MACHINE Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 07/30] hw/arm/virt: introduce DEFINE_VIRT_MACHINE_AS_LATEST Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 08/30] hw/arm/virt: create the 2.7 machine type Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 09/30] hw/i2c: QOM'ify bitbang_i2c.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 10/30] hw/i2c: QOM'ify exynos4210_i2c.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 11/30] hw/i2c: QOM'ify omap_i2c.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 12/30] hw/i2c: QOM'ify versatile_i2c.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 13/30] hw/gpio: QOM'ify omap_gpio.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 14/30] hw/gpio: QOM'ify pl061.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 15/30] hw/gpio: QOM'ify zaurus.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 16/30] hw/misc: QOM'ify arm_l2x0.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 17/30] hw/misc: QOM'ify exynos4210_pmu.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 18/30] hw/misc: QOM'ify mst_fpga.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 19/30] hw/dma: QOM'ify pxa2xx_dma.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 20/30] hw/sd: QOM'ify pl181.c Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 21/30] i2cbus: remove unused dev field Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 22/30] i2c: implement broadcast write Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 23/30] i2c: Factor our send() and recv() common logic Peter Maydell
2016-06-14 14:13 ` [Qemu-devel] [PULL 24/30] introduce aux-bus Peter Maydell
2016-06-14 14:14 ` [Qemu-devel] [PULL 25/30] introduce dpcd module Peter Maydell
2016-06-14 14:14 ` [Qemu-devel] [PULL 26/30] hw/i2c-ddc.c: Implement DDC I2C slave Peter Maydell
2016-06-14 14:14 ` [Qemu-devel] [PULL 27/30] introduce xlnx-dpdma Peter Maydell
2016-06-14 14:14 ` [Qemu-devel] [PULL 28/30] introduce xlnx-dp Peter Maydell
2022-04-07 10:32 ` Peter Maydell
2022-04-07 11:28 ` Frederic Konrad
2022-04-07 12:26 ` Peter Maydell
2016-06-14 14:14 ` [Qemu-devel] [PULL 29/30] arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma Peter Maydell
2016-06-14 14:14 ` [Qemu-devel] [PULL 30/30] target-arm: Don't permit ARMv8-only Neon insns on ARMv7 Peter Maydell
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