From: Eduardo Habkost <ehabkost@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Andreas Färber" <afaerber@suse.de>,
qemu-devel@nongnu.org, "Richard Henderson" <rth@twiddle.net>,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: [Qemu-devel] [PULL 01/10] target-i386: add Skylake-Client cpu model
Date: Tue, 14 Jun 2016 17:58:59 -0300 [thread overview]
Message-ID: <1465937948-548-2-git-send-email-ehabkost@redhat.com> (raw)
In-Reply-To: <1465937948-548-1-git-send-email-ehabkost@redhat.com>
Introduce Skylake-Client cpu mode which inherits the features from
Broadwell and supports some additional features that are: MPX,
XSAVEC, and XGETBV1.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
target-i386/cpu.c | 45 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 895a386..9c5aabc 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1239,6 +1239,51 @@ static X86CPUDefinition builtin_x86_defs[] = {
.model_id = "Intel Core Processor (Broadwell)",
},
{
+ .name = "Skylake-Client",
+ .level = 0xd,
+ .vendor = CPUID_VENDOR_INTEL,
+ .family = 6,
+ .model = 94,
+ .stepping = 3,
+ .features[FEAT_1_EDX] =
+ CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
+ CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
+ CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
+ CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
+ CPUID_DE | CPUID_FP87,
+ .features[FEAT_1_ECX] =
+ CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
+ CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
+ CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
+ CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
+ CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
+ CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
+ .features[FEAT_8000_0001_EDX] =
+ CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
+ CPUID_EXT2_SYSCALL,
+ .features[FEAT_8000_0001_ECX] =
+ CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
+ .features[FEAT_7_0_EBX] =
+ CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
+ CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
+ CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
+ CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
+ CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX,
+ /* Missing: XSAVES (not supported by some Linux versions,
+ * including v4.1 to v4.6).
+ * KVM doesn't yet expose any XSAVES state save component,
+ * and the only one defined in Skylake (processor tracing)
+ * probably will block migration anyway.
+ */
+ .features[FEAT_XSAVE] =
+ CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
+ CPUID_XSAVE_XGETBV1,
+ .features[FEAT_6_EAX] =
+ CPUID_6_EAX_ARAT,
+ .xlevel = 0x80000008,
+ .model_id = "Intel Core Processor (Skylake)",
+ },
+ {
.name = "Opteron_G1",
.level = 5,
.vendor = CPUID_VENDOR_AMD,
--
2.5.5
next prev parent reply other threads:[~2016-06-14 20:59 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-14 20:58 [Qemu-devel] [PULL 00/10] X86 queue, 2016-06-14 Eduardo Habkost
2016-06-14 20:58 ` Eduardo Habkost [this message]
2016-06-14 20:59 ` [Qemu-devel] [PULL 02/10] pc: Add 2.7 machine Eduardo Habkost
2016-06-14 20:59 ` [Qemu-devel] [PULL 03/10] target-i386: Implement CPUID[0xB] (Extended Topology Enumeration) Eduardo Habkost
2016-06-14 20:59 ` [Qemu-devel] [PULL 04/10] target-i386: Remove xlevel & hv-spinlocks option fixups Eduardo Habkost
2016-06-14 20:59 ` [Qemu-devel] [PULL 05/10] target-i386: Move features logic that requires CPUState to realize time Eduardo Habkost
2016-06-14 20:59 ` [Qemu-devel] [PULL 06/10] target-i386: Remove assert(kvm_enabled()) from host_x86_cpu_initfn() Eduardo Habkost
2016-06-14 20:59 ` [Qemu-devel] [PULL 07/10] target-i386: Move xcc->kvm_required check to realize time Eduardo Habkost
2016-06-14 20:59 ` [Qemu-devel] [PULL 08/10] target-i386: Use cpu_generic_init() in cpu_x86_init() Eduardo Habkost
2016-06-14 20:59 ` [Qemu-devel] [PULL 09/10] target-i386: Consolidate calls of object_property_parse() in x86_cpu_parse_featurestr Eduardo Habkost
2016-06-14 20:59 ` [Qemu-devel] [PULL 10/10] target-i386: Print obsolete warnings if +-features are used Eduardo Habkost
2016-06-14 21:16 ` Paolo Bonzini
2016-06-14 21:31 ` Eduardo Habkost
2016-06-14 21:38 ` Paolo Bonzini
2016-06-14 21:46 ` Eduardo Habkost
2016-06-14 21:32 ` [Qemu-devel] [PULL 00/10] X86 queue, 2016-06-14 Eduardo Habkost
2016-06-16 9:53 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1465937948-548-2-git-send-email-ehabkost@redhat.com \
--to=ehabkost@redhat.com \
--cc=afaerber@suse.de \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).