From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 01/22] migration: Define VMSTATE_UINT64_2DARRAY
Date: Fri, 17 Jun 2016 15:25:31 +0100 [thread overview]
Message-ID: <1466173552-25482-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1466173552-25482-1-git-send-email-peter.maydell@linaro.org>
Define a VMSTATE_UINT64_2DARRAY macro, to go with the ones we
already have for other type sizes.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-2-git-send-email-peter.maydell@linaro.org
---
include/migration/vmstate.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h
index 6c65811..25ea58a 100644
--- a/include/migration/vmstate.h
+++ b/include/migration/vmstate.h
@@ -856,6 +856,12 @@ extern const VMStateInfo vmstate_info_bitmap;
#define VMSTATE_UINT64_ARRAY(_f, _s, _n) \
VMSTATE_UINT64_ARRAY_V(_f, _s, _n, 0)
+#define VMSTATE_UINT64_2DARRAY(_f, _s, _n1, _n2) \
+ VMSTATE_UINT64_2DARRAY_V(_f, _s, _n1, _n2, 0)
+
+#define VMSTATE_UINT64_2DARRAY_V(_f, _s, _n1, _n2, _v) \
+ VMSTATE_2DARRAY(_f, _s, _n1, _n2, _v, vmstate_info_uint64, uint64_t)
+
#define VMSTATE_INT16_ARRAY_V(_f, _s, _n, _v) \
VMSTATE_ARRAY(_f, _s, _n, _v, vmstate_info_int16, int16_t)
--
1.9.1
next prev parent reply other threads:[~2016-06-17 14:26 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-17 14:25 [Qemu-devel] [PULL 00/22] target-arm queue Peter Maydell
2016-06-17 14:25 ` Peter Maydell [this message]
2016-06-17 14:25 ` [Qemu-devel] [PULL 02/22] bitops.h: Implement half-shuffle and half-unshuffle ops Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 03/22] target-arm: Define new arm_is_el3_or_mon() function Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 04/22] target-arm: Provide hook to tell GICv3 about changes of security state Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 05/22] target-arm: Add mp-affinity property for ARM CPU class Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 06/22] hw/intc/arm_gicv3: Add state information Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 07/22] hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 08/22] hw/intc/arm_gicv3: Add vmstate descriptors Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 09/22] hw/intc/arm_gicv3: ARM GICv3 device framework Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 10/22] hw/intc/arm_gicv3: Implement functions to identify next pending irq Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 11/22] hw/intc/arm_gicv3: Implement GICv3 distributor registers Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 12/22] hw/intc/arm_gicv3: Implement GICv3 redistributor registers Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 13/22] hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 14/22] hw/intc/arm_gicv3: Implement gicv3_set_irq() Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 15/22] hw/intc/arm_gicv3: Implement GICv3 CPU interface registers Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 16/22] hw/intc/arm_gicv3: Implement gicv3_cpuif_update() Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 17/22] hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 18/22] hw/intc/arm_gicv3: Add IRQ handling CPU interface registers Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 19/22] target-arm/machine.c: Allow user to request GICv3 emulation Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 20/22] target-arm/monitor.c: Advertise emulated GICv3 in capabilities Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 21/22] hw/timer: Add value matching support to aspeed_timer Peter Maydell
2016-06-17 14:25 ` [Qemu-devel] [PULL 22/22] ACPI: ARM: Present GIC version in MADT table Peter Maydell
2016-06-17 16:06 ` [Qemu-devel] [PULL 00/22] target-arm queue Peter Maydell
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