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From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org
Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
	jasowang@redhat.com, marcel@redhat.com, mst@redhat.com,
	pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com,
	alex.williamson@redhat.com, wexu@redhat.com,
	davidkiarie4@gmail.com, peterx@redhat.com
Subject: [Qemu-devel] [PATCH v10 23/26] kvm-irqchip: x86: add msi route notify fn
Date: Tue, 21 Jun 2016 15:47:51 +0800	[thread overview]
Message-ID: <1466495274-5011-24-git-send-email-peterx@redhat.com> (raw)
In-Reply-To: <1466495274-5011-1-git-send-email-peterx@redhat.com>

One more IEC notifier is added to let msi routes know about the IEC
changes. When interrupt invalidation happens, all registered msi routes
will be updated for all PCI devices.

Since both vfio and vhost are possible gsi route consumers, this patch
will go one step further to keep them safe in split irqchip mode and
when irqfd is enabled.

Signed-off-by: Peter Xu <peterx@redhat.com>
---
 hw/pci/pci.c         | 15 +++++++++++++++
 include/hw/pci/pci.h |  2 ++
 kvm-all.c            | 10 +---------
 target-i386/kvm.c    | 30 ++++++++++++++++++++++++++++++
 trace-events         |  1 +
 5 files changed, 49 insertions(+), 9 deletions(-)

diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 3b02888..4ed119e 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -2598,6 +2598,21 @@ PCIDevice *pci_get_function_0(PCIDevice *pci_dev)
     }
 }
 
+MSIMessage pci_get_msi_message(PCIDevice *dev, int vector)
+{
+    MSIMessage msg;
+    if (msix_enabled(dev)) {
+        msg = msix_get_message(dev, vector);
+    } else if (msi_enabled(dev)) {
+        msg = msi_get_message(dev, vector);
+    } else {
+        /* Should never happen */
+        error_report("%s: unknown interrupt type", __func__);
+        abort();
+    }
+    return msg;
+}
+
 static const TypeInfo pci_device_type_info = {
     .name = TYPE_PCI_DEVICE,
     .parent = TYPE_DEVICE,
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 9ed1624..74d797d 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -805,4 +805,6 @@ extern const VMStateDescription vmstate_pci_device;
     .offset     = vmstate_offset_pointer(_state, _field, PCIDevice), \
 }
 
+MSIMessage pci_get_msi_message(PCIDevice *dev, int vector);
+
 #endif
diff --git a/kvm-all.c b/kvm-all.c
index 69ff658..ca30a58 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -1246,15 +1246,7 @@ int kvm_irqchip_add_msi_route(KVMState *s, int vector, PCIDevice *dev)
     MSIMessage msg = {0, 0};
 
     if (dev) {
-        if (msix_enabled(dev)) {
-            msg = msix_get_message(dev, vector);
-        } else if (msi_enabled(dev)) {
-            msg = msi_get_message(dev, vector);
-        } else {
-            /* Should never happen */
-            error_report("%s: unknown interrupt type", __func__);
-            abort();
-        }
+        msg = pci_get_msi_message(dev, vector);
     }
 
     if (kvm_gsi_direct_mapping()) {
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 5d7a7a7..f02ba0a 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -36,6 +36,7 @@
 #include "hw/i386/apic_internal.h"
 #include "hw/i386/apic-msidef.h"
 #include "hw/i386/intel_iommu.h"
+#include "hw/i386/x86-iommu.h"
 
 #include "exec/ioport.h"
 #include "standard-headers/asm-x86/hyperv.h"
@@ -3365,9 +3366,26 @@ struct MSIRouteEntry {
 static QLIST_HEAD(, MSIRouteEntry) msi_route_list = \
     QLIST_HEAD_INITIALIZER(msi_route_list);
 
+static void kvm_update_msi_routes_all(void *private, bool global,
+                                      uint32_t index, uint32_t mask)
+{
+    int cnt = 0;
+    MSIRouteEntry *entry;
+    MSIMessage msg;
+    /* TODO: explicit route update */
+    QLIST_FOREACH(entry, &msi_route_list, list) {
+        cnt++;
+        msg = pci_get_msi_message(entry->dev, entry->vector);
+        kvm_irqchip_update_msi_route(kvm_state, entry->virq,
+                                     msg, entry->dev);
+    }
+    trace_kvm_x86_update_msi_routes(cnt);
+}
+
 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
                                 int vector, PCIDevice *dev)
 {
+    static bool notify_list_inited = false;
     MSIRouteEntry *entry;
 
     if (!dev) {
@@ -3384,6 +3402,18 @@ int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
     QLIST_INSERT_HEAD(&msi_route_list, entry, list);
 
     trace_kvm_x86_add_msi_route(route->gsi);
+
+    if (!notify_list_inited) {
+        /* For the first time we do add route, add ourselves into
+         * IOMMU's IEC notify list if needed. */
+        X86IOMMUState *iommu = x86_iommu_get_default();
+        if (iommu) {
+            x86_iommu_iec_register_notifier(iommu,
+                                            kvm_update_msi_routes_all,
+                                            NULL);
+        }
+        notify_list_inited = true;
+    }
     return 0;
 }
 
diff --git a/trace-events b/trace-events
index 1ca0842..9ce3514 100644
--- a/trace-events
+++ b/trace-events
@@ -2211,6 +2211,7 @@ gicv3_redist_send_sgi(uint32_t cpu, int irq) "GICv3 redistributor %x pending SGI
 kvm_x86_fixup_msi_error(uint32_t gsi) "VT-d failed to remap interrupt for GSI %" PRIu32
 kvm_x86_add_msi_route(int virq) "Adding route entry for virq %d"
 kvm_x86_remove_msi_route(int virq) "Removing route entry for virq %d"
+kvm_x86_update_msi_routes(int num) "Updated %d MSI routes"
 
 # hw/i386/x86-iommu.c
 x86_iommu_iec_notify(bool global, uint32_t index, uint32_t mask) "Notify IEC invalidation: global=%d index=%" PRIu32 " mask=%" PRIu32
-- 
2.4.11

  parent reply	other threads:[~2016-06-21  7:50 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-21  7:47 [Qemu-devel] [PATCH v10 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 01/26] x86-iommu: introduce parent class Peter Xu
2016-06-24  7:10   ` [Qemu-devel] [PATCH v10 27/26] intel_iommu: disallow kernel-irqchip=on with IR Peter Xu
2016-06-24  9:20     ` Peter Xu
2016-07-04 15:39       ` Michael S. Tsirkin
2016-07-05  3:51         ` Peter Xu
2016-07-11 10:17     ` David Kiarie
2016-07-11 12:08       ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 02/26] x86-iommu: provide x86_iommu_get_default Peter Xu
2016-07-04 15:16   ` Michael S. Tsirkin
2016-07-05  5:11     ` Peter Xu
2016-07-04 15:17   ` Michael S. Tsirkin
2016-07-05  5:12     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 03/26] x86-iommu: q35: generalize find_add_as() Peter Xu
2016-07-04 15:16   ` Michael S. Tsirkin
2016-07-04 16:08     ` Paolo Bonzini
2016-07-04 16:35       ` Michael S. Tsirkin
2016-07-04 16:40         ` Paolo Bonzini
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 04/26] x86-iommu: introduce "intremap" property Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 05/26] acpi: enable INTR for DMAR report structure Peter Xu
2016-07-04 15:14   ` Michael S. Tsirkin
2016-07-05  6:39     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 06/26] intel_iommu: allow queued invalidation for IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 07/26] intel_iommu: set IR bit for ECAP register Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 08/26] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-07-04 15:22   ` Michael S. Tsirkin
2016-07-05  7:30     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 09/26] intel_iommu: define interrupt remap table addr register Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 10/26] intel_iommu: handle interrupt remap enable Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 11/26] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 12/26] intel_iommu: add IR translation faults defines Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 13/26] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 14/26] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 15/26] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 16/26] intel_iommu: add support for split irqchip Peter Xu
2016-06-25  8:08   ` Jan Kiszka
2016-06-25 13:18     ` Peter Xu
2016-06-25 15:18       ` Jan Kiszka
2016-06-26  1:48         ` Peter Xu
2016-06-26 13:27           ` Jan Kiszka
2016-06-28  6:10             ` Michael S. Tsirkin
2016-06-28  7:25             ` Peter Xu
2017-01-03  6:15             ` Peter Xu
2017-01-04 10:33               ` Jan Kiszka
2017-01-05  2:21                 ` Peter Xu
2016-07-04 14:32   ` Paolo Bonzini
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 17/26] x86-iommu: introduce IEC notifiers Peter Xu
2016-07-04 14:22   ` Paolo Bonzini
2016-07-05  7:32     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 18/26] ioapic: register IOMMU IEC notifier for ioapic Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 19/26] intel_iommu: Add support for Extended Interrupt Mode Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 20/26] intel_iommu: add SID validation for IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 21/26] kvm-irqchip: simplify kvm_irqchip_add_msi_route Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 22/26] kvm-irqchip: i386: add hook for add/remove virq Peter Xu
2016-06-21  7:47 ` Peter Xu [this message]
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 24/26] kvm-irqchip: do explicit commit when update irq Peter Xu
2016-06-22  3:42   ` [Qemu-devel] [PATCH v10.2 24/26] kvm-irqchip: introduce kvm_irqchip_update_msi_route_no_commit Peter Xu
2016-07-04 14:23   ` [Qemu-devel] [PATCH v10 24/26] kvm-irqchip: do explicit commit when update irq Paolo Bonzini
2016-07-05  7:35     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 25/26] intel_iommu: support all masks in interrupt entry cache invalidation Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 26/26] kvm-all: add trace events for kvm irqchip ops Peter Xu
2016-07-04 14:33 ` [Qemu-devel] [PATCH v10 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU Paolo Bonzini
2016-07-04 16:39 ` Michael S. Tsirkin

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