From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33215) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFGSG-0005VI-7Q for qemu-devel@nongnu.org; Tue, 21 Jun 2016 03:50:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bFGSE-0003kH-FU for qemu-devel@nongnu.org; Tue, 21 Jun 2016 03:50:39 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54194) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFGSE-0003kD-8P for qemu-devel@nongnu.org; Tue, 21 Jun 2016 03:50:38 -0400 From: Peter Xu Date: Tue, 21 Jun 2016 15:47:53 +0800 Message-Id: <1466495274-5011-26-git-send-email-peterx@redhat.com> In-Reply-To: <1466495274-5011-1-git-send-email-peterx@redhat.com> References: <1466495274-5011-1-git-send-email-peterx@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v10 25/26] intel_iommu: support all masks in interrupt entry cache invalidation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com, jasowang@redhat.com, marcel@redhat.com, mst@redhat.com, pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com, alex.williamson@redhat.com, wexu@redhat.com, davidkiarie4@gmail.com, peterx@redhat.com From: Radim Kr=C4=8Dm=C3=A1=C5=99 Linux guests do not gracefully handle cases when the invalidation mask they wanted is not supported, probably because real hardware always allowed all. We can just say that all 16 masks are supported, because both ioapic_iec_notifier and kvm_update_msi_routes_all invalidate all caches. Signed-off-by: Radim Kr=C4=8Dm=C3=A1=C5=99 --- hw/i386/intel_iommu.c | 2 +- hw/i386/intel_iommu_internal.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 789ee25..4ff9a24 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2357,7 +2357,7 @@ static void vtd_init(IntelIOMMUState *s) s->ecap =3D VTD_ECAP_QI | VTD_ECAP_IRO; =20 if (x86_iommu->intr_supported) { - s->ecap |=3D VTD_ECAP_IR | VTD_ECAP_EIM; + s->ecap |=3D VTD_ECAP_IR | VTD_ECAP_EIM | VTD_ECAP_MHMV; } =20 vtd_reset_context_cache(s); diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_interna= l.h index 72b0114..0829a50 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -186,6 +186,7 @@ /* Interrupt Remapping support */ #define VTD_ECAP_IR (1ULL << 3) #define VTD_ECAP_EIM (1ULL << 4) +#define VTD_ECAP_MHMV (15ULL << 20) =20 /* CAP_REG */ /* (offset >> 4) << 24 */ --=20 2.4.11