qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org
Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
	jasowang@redhat.com, marcel@redhat.com, mst@redhat.com,
	pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com,
	alex.williamson@redhat.com, wexu@redhat.com,
	davidkiarie4@gmail.com, peterx@redhat.com
Subject: [Qemu-devel] [PATCH v10 04/26] x86-iommu: introduce "intremap" property
Date: Tue, 21 Jun 2016 15:47:32 +0800	[thread overview]
Message-ID: <1466495274-5011-5-git-send-email-peterx@redhat.com> (raw)
In-Reply-To: <1466495274-5011-1-git-send-email-peterx@redhat.com>

Adding one property for intel-iommu devices to specify whether we should
support interrupt remapping. By default, IR is disabled. To enable it,
we should use (take Intel IOMMU as example):

  -device intel_iommu,intremap=on

This property can be shared by Intel and future AMD IOMMUs.

Signed-off-by: Peter Xu <peterx@redhat.com>
---
 hw/i386/x86-iommu.c         | 23 +++++++++++++++++++++++
 include/hw/i386/x86-iommu.h |  1 +
 2 files changed, 24 insertions(+)

diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c
index f395139..4280839 100644
--- a/hw/i386/x86-iommu.c
+++ b/hw/i386/x86-iommu.c
@@ -59,9 +59,32 @@ static void x86_iommu_class_init(ObjectClass *klass, void *data)
     dc->realize = x86_iommu_realize;
 }
 
+static bool x86_iommu_intremap_prop_get(Object *o, Error **errp)
+{
+    X86IOMMUState *s = X86_IOMMU_DEVICE(o);
+    return s->intr_supported;
+}
+
+static void x86_iommu_intremap_prop_set(Object *o, bool value, Error **errp)
+{
+    X86IOMMUState *s = X86_IOMMU_DEVICE(o);
+    s->intr_supported = value;
+}
+
+static void x86_iommu_instance_init(Object *o)
+{
+    X86IOMMUState *s = X86_IOMMU_DEVICE(o);
+
+    /* By default, do not support IR */
+    s->intr_supported = false;
+    object_property_add_bool(o, "intremap", x86_iommu_intremap_prop_get,
+                             x86_iommu_intremap_prop_set, NULL);
+}
+
 static const TypeInfo x86_iommu_info = {
     .name          = TYPE_X86_IOMMU_DEVICE,
     .parent        = TYPE_SYS_BUS_DEVICE,
+    .instance_init = x86_iommu_instance_init,
     .instance_size = sizeof(X86IOMMUState),
     .class_init    = x86_iommu_class_init,
     .class_size    = sizeof(X86IOMMUClass),
diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h
index 2070cd1..07199be 100644
--- a/include/hw/i386/x86-iommu.h
+++ b/include/hw/i386/x86-iommu.h
@@ -47,6 +47,7 @@ struct X86IOMMUClass {
 
 struct X86IOMMUState {
     SysBusDevice busdev;
+    bool intr_supported;        /* Whether vIOMMU supports IR */
 };
 
 /**
-- 
2.4.11

  parent reply	other threads:[~2016-06-21  7:48 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-21  7:47 [Qemu-devel] [PATCH v10 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 01/26] x86-iommu: introduce parent class Peter Xu
2016-06-24  7:10   ` [Qemu-devel] [PATCH v10 27/26] intel_iommu: disallow kernel-irqchip=on with IR Peter Xu
2016-06-24  9:20     ` Peter Xu
2016-07-04 15:39       ` Michael S. Tsirkin
2016-07-05  3:51         ` Peter Xu
2016-07-11 10:17     ` David Kiarie
2016-07-11 12:08       ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 02/26] x86-iommu: provide x86_iommu_get_default Peter Xu
2016-07-04 15:16   ` Michael S. Tsirkin
2016-07-05  5:11     ` Peter Xu
2016-07-04 15:17   ` Michael S. Tsirkin
2016-07-05  5:12     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 03/26] x86-iommu: q35: generalize find_add_as() Peter Xu
2016-07-04 15:16   ` Michael S. Tsirkin
2016-07-04 16:08     ` Paolo Bonzini
2016-07-04 16:35       ` Michael S. Tsirkin
2016-07-04 16:40         ` Paolo Bonzini
2016-06-21  7:47 ` Peter Xu [this message]
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 05/26] acpi: enable INTR for DMAR report structure Peter Xu
2016-07-04 15:14   ` Michael S. Tsirkin
2016-07-05  6:39     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 06/26] intel_iommu: allow queued invalidation for IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 07/26] intel_iommu: set IR bit for ECAP register Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 08/26] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-07-04 15:22   ` Michael S. Tsirkin
2016-07-05  7:30     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 09/26] intel_iommu: define interrupt remap table addr register Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 10/26] intel_iommu: handle interrupt remap enable Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 11/26] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 12/26] intel_iommu: add IR translation faults defines Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 13/26] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 14/26] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 15/26] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 16/26] intel_iommu: add support for split irqchip Peter Xu
2016-06-25  8:08   ` Jan Kiszka
2016-06-25 13:18     ` Peter Xu
2016-06-25 15:18       ` Jan Kiszka
2016-06-26  1:48         ` Peter Xu
2016-06-26 13:27           ` Jan Kiszka
2016-06-28  6:10             ` Michael S. Tsirkin
2016-06-28  7:25             ` Peter Xu
2017-01-03  6:15             ` Peter Xu
2017-01-04 10:33               ` Jan Kiszka
2017-01-05  2:21                 ` Peter Xu
2016-07-04 14:32   ` Paolo Bonzini
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 17/26] x86-iommu: introduce IEC notifiers Peter Xu
2016-07-04 14:22   ` Paolo Bonzini
2016-07-05  7:32     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 18/26] ioapic: register IOMMU IEC notifier for ioapic Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 19/26] intel_iommu: Add support for Extended Interrupt Mode Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 20/26] intel_iommu: add SID validation for IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 21/26] kvm-irqchip: simplify kvm_irqchip_add_msi_route Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 22/26] kvm-irqchip: i386: add hook for add/remove virq Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 23/26] kvm-irqchip: x86: add msi route notify fn Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 24/26] kvm-irqchip: do explicit commit when update irq Peter Xu
2016-06-22  3:42   ` [Qemu-devel] [PATCH v10.2 24/26] kvm-irqchip: introduce kvm_irqchip_update_msi_route_no_commit Peter Xu
2016-07-04 14:23   ` [Qemu-devel] [PATCH v10 24/26] kvm-irqchip: do explicit commit when update irq Paolo Bonzini
2016-07-05  7:35     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 25/26] intel_iommu: support all masks in interrupt entry cache invalidation Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 26/26] kvm-all: add trace events for kvm irqchip ops Peter Xu
2016-07-04 14:33 ` [Qemu-devel] [PATCH v10 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU Paolo Bonzini
2016-07-04 16:39 ` Michael S. Tsirkin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1466495274-5011-5-git-send-email-peterx@redhat.com \
    --to=peterx@redhat.com \
    --cc=alex.williamson@redhat.com \
    --cc=davidkiarie4@gmail.com \
    --cc=ehabkost@redhat.com \
    --cc=imammedo@redhat.com \
    --cc=jan.kiszka@web.de \
    --cc=jasowang@redhat.com \
    --cc=marcel@redhat.com \
    --cc=mst@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=rkrcmar@redhat.com \
    --cc=rth@twiddle.net \
    --cc=wexu@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).