From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52814) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bG0BI-0006zr-A3 for qemu-devel@nongnu.org; Thu, 23 Jun 2016 04:40:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bG0BD-000306-BB for qemu-devel@nongnu.org; Thu, 23 Jun 2016 04:40:11 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36619) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bG0BD-0002yj-52 for qemu-devel@nongnu.org; Thu, 23 Jun 2016 04:40:07 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0E55564094 for ; Thu, 23 Jun 2016 08:40:06 +0000 (UTC) Message-ID: <1466671203.26189.35.camel@redhat.com> From: Gerd Hoffmann Date: Thu, 23 Jun 2016 10:40:03 +0200 In-Reply-To: <20160623024400-mutt-send-email-mst@redhat.com> References: <20160617131815.GA18662@thinpad.lan.raisama.net> <20160617151900.GE18662@thinpad.lan.raisama.net> <20160617154905.GH18662@thinpad.lan.raisama.net> <20160621194440.GN17952@thinpad.lan.raisama.net> <9b76415a-23e6-3ded-4dbc-42838cc164b0@redhat.com> <20160622142414.GI30202@redhat.com> <20160623014216-mutt-send-email-mst@redhat.com> <20160622232308.GQ30202@redhat.com> <20160623024400-mutt-send-email-mst@redhat.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Mime-Version: 1.0 Subject: Re: [Qemu-devel] Default for phys-addr-bits? (was Re: [PATCH 4/5] x86: Allow physical address bits to be set) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: Andrea Arcangeli , Marcel Apfelbaum , Paolo Bonzini , qemu-devel@nongnu.org, Eduardo Habkost , "Dr. David Alan Gilbert" Hi, > > Well the crash of guest phys bits > host phys bits, should be easy to > > reproduce by booting a 65GB guest on a 64GB RAM + 2GB swap host with > > 36 host phys bits using the upstream qemu that forces the guest phys > > bits to 40. >=20 > So you supply more RAM than host can address, and guest crashes? Yep. The only reason we don't see this happening in practice is that it's probably next to impossible to find a machine which has (a) only 36 physical address lines and (b) allows to plug that much RAM. > Why are we worried about it? It's more a issue with pci ressources. In theory seabios/edk2 could go figure how big the physical address space is, then map 64bit pci bars as high as possible, thereby making stuff like etc/reserved-memory-end in fw_cfg unnecessary. But with qemu saying 40 phys bits are available even if they are not this approach isn't going to fly ... cheers, Gerd