From: Andrew Jeffery <andrew@aj.id.au>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Cédric Le Goater" <clg@kaod.org>,
"Joel Stanley" <joel@jms.id.au>,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
"Andrew Jeffery" <andrew@aj.id.au>
Subject: [Qemu-devel] [PATCH v3 0/3] Add ASPEED SCU device
Date: Fri, 24 Jun 2016 14:28:22 +0930 [thread overview]
Message-ID: <1466744305-23163-1-git-send-email-andrew@aj.id.au> (raw)
Hi all,
These are three patches implementing minimal functionality for the ASPEED System
Control Unit device and integrating it into the AST2400 SoC model/palmetto-bmc
machine. The device is critical for initialisation of u-boot and the kernel as
it provides chip level control registers, influencing the configuration of the
software and the software's configuration of the SoC.
Since v2:
* Fix mixing of offsets and register indexes
* Sanity check device property values
* SoC actually initialises the silicon revision
Since v1:
* Select reset values based on silicon revision
* Expose hardware strapping values via properties
Andrew Jeffery (3):
hw/misc: Add a model for the ASPEED System Control Unit
ast2400: Integrate the SCU model and set silicon revision
palmetto-bmc: Configure the SCU's hardware strapping register
hw/arm/ast2400.c | 21 ++++
hw/arm/palmetto-bmc.c | 2 +
hw/misc/Makefile.objs | 1 +
hw/misc/aspeed_scu.c | 284 +++++++++++++++++++++++++++++++++++++++++++
hw/misc/trace-events | 3 +
include/hw/arm/ast2400.h | 2 +
include/hw/misc/aspeed_scu.h | 34 ++++++
7 files changed, 347 insertions(+)
create mode 100644 hw/misc/aspeed_scu.c
create mode 100644 include/hw/misc/aspeed_scu.h
--
2.7.4
next reply other threads:[~2016-06-24 4:59 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-24 4:58 Andrew Jeffery [this message]
2016-06-24 4:58 ` [Qemu-devel] [PATCH v3 1/3] hw/misc: Add a model for the ASPEED System Control Unit Andrew Jeffery
2016-06-27 13:42 ` Peter Maydell
2016-06-27 14:01 ` Andrew Jeffery
2016-06-24 4:58 ` [Qemu-devel] [PATCH v3 2/3] ast2400: Integrate the SCU model and set silicon revision Andrew Jeffery
2016-06-24 4:58 ` [Qemu-devel] [PATCH v3 3/3] palmetto-bmc: Configure the SCU's hardware strapping register Andrew Jeffery
2016-06-24 10:53 ` Cédric Le Goater
2016-06-27 13:47 ` [Qemu-devel] [PATCH v3 0/3] Add ASPEED SCU device Peter Maydell
2016-06-27 14:13 ` Andrew Jeffery
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