[Qemu-devel] [PULL 10/10] target-mips: Add FCR31's FS bit definition

[Leon Alrae <leon.alrae@imgtec.com>]

From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>

Add preprocessor definition of FCR31's FS bit, and update related
code for setting this bit.

Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 target-mips/cpu.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index bc0c905..c2da5ec 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -113,6 +113,7 @@ struct CPUMIPSFPUContext {
     /* fcsr */
     uint32_t fcr31_rw_bitmask;
     uint32_t fcr31;
+#define FCR31_FS 24
 #define FCR31_ABS2008 19
 #define FCR31_NAN2008 18
 #define SET_FP_COND(num,env)     do { ((env).fcr31) |= ((num) ? (1 << ((num) + 24)) : (1 << 23)); } while(0)
@@ -850,7 +851,7 @@ static inline void restore_rounding_mode(CPUMIPSState *env)
 
 static inline void restore_flush_mode(CPUMIPSState *env)
 {
-    set_flush_to_zero((env->active_fpu.fcr31 & (1 << 24)) != 0,
+    set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0,
                       &env->active_fpu.fp_status);
 }
 
-- 
2.7.4