From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60038) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHAHq-0001i1-1I for qemu-devel@nongnu.org; Sun, 26 Jun 2016 09:39:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bHAHk-0003AQ-DC for qemu-devel@nongnu.org; Sun, 26 Jun 2016 09:39:44 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:27665) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHAHk-0003AK-7C for qemu-devel@nongnu.org; Sun, 26 Jun 2016 09:39:40 -0400 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id 43B186CAC2899 for ; Sun, 26 Jun 2016 14:39:36 +0100 (IST) From: Leon Alrae Date: Sun, 26 Jun 2016 14:38:42 +0100 Message-ID: <1466948322-27138-11-git-send-email-leon.alrae@imgtec.com> In-Reply-To: <1466948322-27138-1-git-send-email-leon.alrae@imgtec.com> References: <1466948322-27138-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PULL 10/10] target-mips: Add FCR31's FS bit definition List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Aleksandar Markovic From: Aleksandar Markovic Add preprocessor definition of FCR31's FS bit, and update related code for setting this bit. Signed-off-by: Aleksandar Markovic Reviewed-by: Leon Alrae Signed-off-by: Leon Alrae --- target-mips/cpu.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target-mips/cpu.h b/target-mips/cpu.h index bc0c905..c2da5ec 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -113,6 +113,7 @@ struct CPUMIPSFPUContext { /* fcsr */ uint32_t fcr31_rw_bitmask; uint32_t fcr31; +#define FCR31_FS 24 #define FCR31_ABS2008 19 #define FCR31_NAN2008 18 #define SET_FP_COND(num,env) do { ((env).fcr31) |= ((num) ? (1 << ((num) + 24)) : (1 << 23)); } while(0) @@ -850,7 +851,7 @@ static inline void restore_rounding_mode(CPUMIPSState *env) static inline void restore_flush_mode(CPUMIPSState *env) { - set_flush_to_zero((env->active_fpu.fcr31 & (1 << 24)) != 0, + set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0, &env->active_fpu.fp_status); } -- 2.7.4