From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59919) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHAHV-0001Qg-10 for qemu-devel@nongnu.org; Sun, 26 Jun 2016 09:39:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bHAHS-00038D-Sf for qemu-devel@nongnu.org; Sun, 26 Jun 2016 09:39:23 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:15633) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHAHS-000385-N1 for qemu-devel@nongnu.org; Sun, 26 Jun 2016 09:39:22 -0400 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id 85C6DB2774CAB for ; Sun, 26 Jun 2016 14:39:18 +0100 (IST) From: Leon Alrae Date: Sun, 26 Jun 2016 14:38:36 +0100 Message-ID: <1466948322-27138-5-git-send-email-leon.alrae@imgtec.com> In-Reply-To: <1466948322-27138-1-git-send-email-leon.alrae@imgtec.com> References: <1466948322-27138-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PULL 04/10] softfloat: Handle snan_bit_is_one == 0 in MIPS pickNaNMulAdd() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Aleksandar Markovic From: Aleksandar Markovic Only for Mips platform, and only for cases when snan_bit_is_one is 0, correct the order of argument comparisons in pickNaNMulAdd(). For more info, see [1], page 53, section "3.5.3 NaN Propagation". [1] "MIPS Architecture for Programmers Volume IV-j: The MIPS32 SIMD Architecture Module", Imagination Technologies LTD, Revision 1.12, February 3, 2016 Signed-off-by: Aleksandar Markovic Reviewed-by: Leon Alrae Reviewed-by: Peter Maydell [leon.alrae@imgtec.com: * reworded the subject of the patch * swapped if/else code blocks to match the commit description] Signed-off-by: Leon Alrae --- fpu/softfloat-specialize.h | 41 +++++++++++++++++++++++++++++------------ 1 file changed, 29 insertions(+), 12 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index a1bcb46..43d0890 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -571,19 +571,36 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, return 3; } - /* Prefer sNaN over qNaN, in the a, b, c order. */ - if (aIsSNaN) { - return 0; - } else if (bIsSNaN) { - return 1; - } else if (cIsSNaN) { - return 2; - } else if (aIsQNaN) { - return 0; - } else if (bIsQNaN) { - return 1; + if (status->snan_bit_is_one) { + /* Prefer sNaN over qNaN, in the a, b, c order. */ + if (aIsSNaN) { + return 0; + } else if (bIsSNaN) { + return 1; + } else if (cIsSNaN) { + return 2; + } else if (aIsQNaN) { + return 0; + } else if (bIsQNaN) { + return 1; + } else { + return 2; + } } else { - return 2; + /* Prefer sNaN over qNaN, in the c, a, b order. */ + if (cIsSNaN) { + return 2; + } else if (aIsSNaN) { + return 0; + } else if (bIsSNaN) { + return 1; + } else if (cIsQNaN) { + return 2; + } else if (aIsQNaN) { + return 0; + } else { + return 1; + } } } #elif defined(TARGET_PPC) -- 2.7.4