[Qemu-devel] [PATCH 5/8] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set

["Cédric Le Goater" <clg@kaod.org>]

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>

The architecture specifies that any instruction that sets MSR:PR will also
set MSR:EE, IR and DR.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 target-ppc/helper_regs.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
index 8fc09344db29..8fdfa5c7e6ab 100644
--- a/target-ppc/helper_regs.h
+++ b/target-ppc/helper_regs.h
@@ -136,6 +136,10 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
         /* Change the exception prefix on PowerPC 601 */
         env->excp_prefix = ((value >> MSR_EP) & 1) * 0xFFF00000;
     }
+    /* If PR=1 then EE, IR and DR must be 1 */
+    if ((value >> MSR_PR) & 1) {
+        value |= (1 << MSR_EE) | (1 << MSR_DR) | (1 << MSR_IR);
+    }
 #endif
     env->msr = value;
     hreg_compute_hflags(env);
-- 
2.1.4