From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 11/18] m25p80: Allow more than four banks.
Date: Mon, 27 Jun 2016 15:45:03 +0100 [thread overview]
Message-ID: <1467038710-24307-12-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1467038710-24307-1-git-send-email-peter.maydell@linaro.org>
From: Marcin Krzeminski <marcin.krzeminski@nokia.com>
Allow to have more than four 16MiB regions for bigger flash devices.
Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-id: 1466755631-25201-4-git-send-email-marcin.krzeminski@nokia.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/block/m25p80.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 752c43e..187899c 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -129,7 +129,6 @@ typedef struct FlashPartInfo {
#define EVCFG_QUAD_IO_ENABLED (1 << 7)
#define NVCFG_4BYTE_ADDR_MASK (1 << 0)
#define NVCFG_LOWER_SEGMENT_MASK (1 << 1)
-#define CFG_UPPER_128MB_SEG_ENABLED 0x3
/* Numonyx (Micron) Flag Status Register macros */
#define FSR_4BYTE_ADDR_MODE_ENABLED 0x1
@@ -545,7 +544,7 @@ static void complete_collecting_data(Flash *s)
}
if (get_addr_length(s) == 3) {
- s->cur_addr += (s->ear & 0x3) * MAX_3BYTES_SIZE;
+ s->cur_addr += s->ear * MAX_3BYTES_SIZE;
}
s->state = STATE_IDLE;
@@ -644,7 +643,7 @@ static void reset_memory(Flash *s)
s->four_bytes_address_mode = true;
}
if (!(s->nonvolatile_cfg & NVCFG_LOWER_SEGMENT_MASK)) {
- s->ear = CFG_UPPER_128MB_SEG_ENABLED;
+ s->ear = s->size / MAX_3BYTES_SIZE - 1;
}
break;
default:
--
1.9.1
next prev parent reply other threads:[~2016-06-27 14:45 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-27 14:44 [Qemu-devel] [PULL 00/18] target-arm queue Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 01/18] hw/intc/arm_gicv3: Add missing break Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 02/18] cadence_uart: Protect against transmit errors Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 03/18] cadence_gem: Avoid infinite loops with a misconfigured buffer Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 04/18] cadence_gem: Set the last bit when wrap is set Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 05/18] arm: Re-enable tmp105 test Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 06/18] hw/misc: Add a model for the ASPEED System Control Unit Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 07/18] ast2400: Integrate the SCU model and set silicon revision Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 08/18] palmetto-bmc: Configure the SCU's hardware strapping register Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 09/18] m25p80: Replace JEDEC ID masking with function Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 10/18] m25p80: Make a table for JEDEC ID Peter Maydell
2016-06-27 14:45 ` Peter Maydell [this message]
2016-06-27 14:45 ` [Qemu-devel] [PULL 12/18] m25p80: Introduce COLLECTING_VAR_LEN_DATA state Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 13/18] m25p80: Add additional flash commands: Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 14/18] m25p80: Introduce quad and equad modes Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 15/18] m25p80: Introduce configuration registers Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 16/18] m25p80: Fast read commands family changes Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 17/18] m25p80: New flash devices Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 18/18] m25p80: Fix WINBOND fast read command handling Peter Maydell
2016-06-27 15:35 ` [Qemu-devel] [PULL 00/18] target-arm queue Peter Maydell
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