From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 02/18] cadence_uart: Protect against transmit errors
Date: Mon, 27 Jun 2016 15:44:54 +0100 [thread overview]
Message-ID: <1467038710-24307-3-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1467038710-24307-1-git-send-email-peter.maydell@linaro.org>
From: Alistair Francis <alistair.francis@xilinx.com>
If qemu_chr_fe_write() returns an error (represented by a negative
number) we should skip incrementing the count and initiating a
memmove().
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 667e5dc534d33338fcfc2471e5aa32fe7cbd13dc.1466546703.git.alistair.francis@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/char/cadence_uart.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index c856fc3..844542f 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -288,8 +288,11 @@ static gboolean cadence_uart_xmit(GIOChannel *chan, GIOCondition cond,
}
ret = qemu_chr_fe_write(s->chr, s->tx_fifo, s->tx_count);
- s->tx_count -= ret;
- memmove(s->tx_fifo, s->tx_fifo + ret, s->tx_count);
+
+ if (ret >= 0) {
+ s->tx_count -= ret;
+ memmove(s->tx_fifo, s->tx_fifo + ret, s->tx_count);
+ }
if (s->tx_count) {
int r = qemu_chr_fe_add_watch(s->chr, G_IO_OUT|G_IO_HUP,
--
1.9.1
next prev parent reply other threads:[~2016-06-27 14:45 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-27 14:44 [Qemu-devel] [PULL 00/18] target-arm queue Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 01/18] hw/intc/arm_gicv3: Add missing break Peter Maydell
2016-06-27 14:44 ` Peter Maydell [this message]
2016-06-27 14:44 ` [Qemu-devel] [PULL 03/18] cadence_gem: Avoid infinite loops with a misconfigured buffer Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 04/18] cadence_gem: Set the last bit when wrap is set Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 05/18] arm: Re-enable tmp105 test Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 06/18] hw/misc: Add a model for the ASPEED System Control Unit Peter Maydell
2016-06-27 14:44 ` [Qemu-devel] [PULL 07/18] ast2400: Integrate the SCU model and set silicon revision Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 08/18] palmetto-bmc: Configure the SCU's hardware strapping register Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 09/18] m25p80: Replace JEDEC ID masking with function Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 10/18] m25p80: Make a table for JEDEC ID Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 11/18] m25p80: Allow more than four banks Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 12/18] m25p80: Introduce COLLECTING_VAR_LEN_DATA state Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 13/18] m25p80: Add additional flash commands: Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 14/18] m25p80: Introduce quad and equad modes Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 15/18] m25p80: Introduce configuration registers Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 16/18] m25p80: Fast read commands family changes Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 17/18] m25p80: New flash devices Peter Maydell
2016-06-27 14:45 ` [Qemu-devel] [PULL 18/18] m25p80: Fix WINBOND fast read command handling Peter Maydell
2016-06-27 15:35 ` [Qemu-devel] [PULL 00/18] target-arm queue Peter Maydell
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