From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58968) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHboE-0006kI-Tt for qemu-devel@nongnu.org; Mon, 27 Jun 2016 15:03:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bHboC-0008OX-7T for qemu-devel@nongnu.org; Mon, 27 Jun 2016 15:03:01 -0400 Received: from out3-smtp.messagingengine.com ([66.111.4.27]:47051) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHbo9-0008FY-VA for qemu-devel@nongnu.org; Mon, 27 Jun 2016 15:03:00 -0400 From: "Emilio G. Cota" Date: Mon, 27 Jun 2016 15:02:02 -0400 Message-Id: <1467054136-10430-17-git-send-email-cota@braap.org> In-Reply-To: <1467054136-10430-1-git-send-email-cota@braap.org> References: <1467054136-10430-1-git-send-email-cota@braap.org> Subject: [Qemu-devel] [RFC 16/30] target-i386: emulate LOCK'ed XADD using atomic helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: QEMU Developers , MTTCG Devel Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Paolo Bonzini , Richard Henderson , Sergey Fedorov , Alvise Rigo , Peter Maydell Signed-off-by: Emilio G. Cota --- target-i386/translate.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index a5a633b..7df744e 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1314,6 +1314,7 @@ glue(gen_atomic_, NAME)(TCGv ret, TCGv addr, TCGv reg, TCGMemOp ot) \ } #endif /* TARGET_X86_64 */ +GEN_ATOMIC_HELPER(fetch_add) GEN_ATOMIC_HELPER(fetch_sub) GEN_ATOMIC_HELPER(add_fetch) @@ -5227,10 +5228,16 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_op_mov_reg_v(ot, rm, cpu_T0); } else { gen_lea_modrm(env, s, modrm); - gen_op_mov_v_reg(ot, cpu_T0, reg); - gen_op_ld_v(s, ot, cpu_T1, cpu_A0); - tcg_gen_add_tl(cpu_T0, cpu_T0, cpu_T1); - gen_op_st_v(s, ot, cpu_T0, cpu_A0); + if (s->prefix & PREFIX_LOCK) { + gen_op_mov_v_reg(ot, cpu_T0, reg); + gen_atomic_fetch_add(cpu_T1, cpu_A0, cpu_T0, ot); + tcg_gen_add_tl(cpu_T0, cpu_T0, cpu_T1); + } else { + gen_op_ld_v(s, ot, cpu_T1, cpu_A0); + gen_op_mov_v_reg(ot, cpu_T0, reg); + tcg_gen_add_tl(cpu_T0, cpu_T0, cpu_T1); + gen_op_st_v(s, ot, cpu_T0, cpu_A0); + } gen_op_mov_reg_v(ot, reg, cpu_T1); } gen_op_update2_cc(); -- 2.5.0