From: "Emilio G. Cota" <cota@braap.org>
To: QEMU Developers <qemu-devel@nongnu.org>,
MTTCG Devel <mttcg@listserver.greensocs.com>
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <rth@twiddle.net>,
"Sergey Fedorov" <serge.fdrv@gmail.com>,
"Alvise Rigo" <a.rigo@virtualopensystems.com>,
"Peter Maydell" <peter.maydell@linaro.org>
Subject: [Qemu-devel] [RFC 03/30] cpu_ldst: add cpu_cmpxchg helpers
Date: Mon, 27 Jun 2016 15:01:49 -0400 [thread overview]
Message-ID: <1467054136-10430-4-git-send-email-cota@braap.org> (raw)
In-Reply-To: <1467054136-10430-1-git-send-email-cota@braap.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
---
include/exec/cpu_atomic_template.h | 56 +++++++++++++++++++++++++++++
include/exec/cpu_atomic_useronly_template.h | 39 ++++++++++++++++++++
include/exec/cpu_ldst_template.h | 2 ++
include/exec/cpu_ldst_useronly_template.h | 2 ++
4 files changed, 99 insertions(+)
create mode 100644 include/exec/cpu_atomic_template.h
create mode 100644 include/exec/cpu_atomic_useronly_template.h
diff --git a/include/exec/cpu_atomic_template.h b/include/exec/cpu_atomic_template.h
new file mode 100644
index 0000000..13f4ffd
--- /dev/null
+++ b/include/exec/cpu_atomic_template.h
@@ -0,0 +1,56 @@
+#include "tcg/tcg.h"
+
+static inline DATA_TYPE
+glue(glue(glue(cpu_cmpxchg, SUFFIX), MEMSUFFIX),
+ _ra)(CPUArchState *env, target_ulong ptr, DATA_TYPE old, DATA_TYPE new,
+ uintptr_t ra)
+{
+ target_ulong addr;
+ TCGMemOpIdx oi;
+ int page_index;
+ DATA_TYPE ret;
+ int mmu_idx;
+
+ addr = ptr;
+ page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
+ mmu_idx = CPU_MMU_INDEX;
+ if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
+ (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
+ oi = make_memop_idx(SHIFT, mmu_idx);
+ ret = glue(glue(helper_cmpxchg, SUFFIX), MMUSUFFIX)(env, addr, old, new,
+ oi, ra);
+ } else {
+ uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
+
+ ret = atomic_cmpxchg((DATA_TYPE *)hostaddr, old, new);
+ }
+ return ret;
+}
+
+/* define cmpxchgo once ldq and stq have been defined */
+#if DATA_SIZE == 8
+/* returns true on success, false on failure */
+static inline bool
+glue(glue(cpu_cmpxchgo, MEMSUFFIX), _ra)(CPUArchState *env, target_ulong ptr,
+ uint64_t *old_lo, uint64_t *old_hi,
+ uint64_t new_lo, uint64_t new_hi,
+ uintptr_t retaddr)
+{
+ uint64_t orig_lo, orig_hi;
+ bool ret = true;
+
+ tcg_cmpxchg_lock(ptr);
+ orig_lo = glue(glue(cpu_ldq, MEMSUFFIX), _ra)(env, ptr, retaddr);
+ orig_hi = glue(glue(cpu_ldq, MEMSUFFIX), _ra)(env, ptr + 8, retaddr);
+ if (orig_lo == *old_lo && orig_hi == *old_hi) {
+ glue(glue(cpu_stq, MEMSUFFIX), _ra)(env, ptr, new_lo, retaddr);
+ glue(glue(cpu_stq, MEMSUFFIX), _ra)(env, ptr + 8, new_hi, retaddr);
+ } else {
+ *old_lo = orig_lo;
+ *old_hi = orig_hi;
+ ret = false;
+ }
+ tcg_cmpxchg_unlock();
+ return ret;
+}
+#endif
diff --git a/include/exec/cpu_atomic_useronly_template.h b/include/exec/cpu_atomic_useronly_template.h
new file mode 100644
index 0000000..c7c0a3e
--- /dev/null
+++ b/include/exec/cpu_atomic_useronly_template.h
@@ -0,0 +1,39 @@
+#include "tcg/tcg.h"
+
+static inline DATA_TYPE
+glue(glue(glue(cpu_cmpxchg, SUFFIX), MEMSUFFIX),
+ _ra)(CPUArchState *env, target_ulong ptr, DATA_TYPE old, DATA_TYPE new,
+ uintptr_t ra)
+{
+ DATA_TYPE *hostaddr = g2h(ptr);
+
+ return atomic_cmpxchg(hostaddr, old, new);
+}
+
+/* define cmpxchgo once ldq and stq have been defined */
+#if DATA_SIZE == 8
+/* returns true on success, false on failure */
+static inline bool
+glue(glue(cpu_cmpxchgo, MEMSUFFIX),
+ _ra)(CPUArchState *env, target_ulong ptr, uint64_t *old_lo,
+ uint64_t *old_hi, uint64_t new_lo, uint64_t new_hi, uintptr_t retaddr)
+{
+ uint64_t *hostaddr = g2h(ptr);
+ uint64_t orig_lo, orig_hi;
+ bool ret = true;
+
+ tcg_cmpxchg_lock(ptr);
+ orig_lo = *hostaddr;
+ orig_hi = *(hostaddr + 1);
+ if (orig_lo == *old_lo && orig_hi == *old_hi) {
+ *hostaddr = new_lo;
+ *(hostaddr + 1) = new_hi;
+ } else {
+ *old_lo = orig_lo;
+ *old_hi = orig_hi;
+ ret = false;
+ }
+ tcg_cmpxchg_unlock();
+ return ret;
+}
+#endif
diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h
index eaf69a1..2329b66 100644
--- a/include/exec/cpu_ldst_template.h
+++ b/include/exec/cpu_ldst_template.h
@@ -194,6 +194,8 @@ glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr,
glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(env, ptr, v, 0);
}
+#include "exec/cpu_atomic_template.h"
+
#endif /* !SOFTMMU_CODE_ACCESS */
#undef RES_TYPE
diff --git a/include/exec/cpu_ldst_useronly_template.h b/include/exec/cpu_ldst_useronly_template.h
index b1378bf..e16f892 100644
--- a/include/exec/cpu_ldst_useronly_template.h
+++ b/include/exec/cpu_ldst_useronly_template.h
@@ -118,6 +118,8 @@ glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
{
glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(env, ptr, v);
}
+
+#include "exec/cpu_atomic_useronly_template.h"
#endif
#undef RES_TYPE
--
2.5.0
next prev parent reply other threads:[~2016-06-27 19:02 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-27 19:01 [Qemu-devel] [RFC 00/30] cmpxchg-based emulation of atomics Emilio G. Cota
2016-06-27 19:01 ` [Qemu-devel] [RFC 01/30] softmmu: add cmpxchg helpers Emilio G. Cota
2016-06-27 20:11 ` Richard Henderson
2016-06-27 21:19 ` Emilio G. Cota
2016-06-27 21:43 ` Richard Henderson
2016-06-27 21:48 ` Peter Maydell
2016-06-27 21:53 ` Richard Henderson
2016-06-27 19:01 ` [Qemu-devel] [RFC 02/30] tcg: add tcg_cmpxchg_lock Emilio G. Cota
2016-06-27 20:07 ` Richard Henderson
2016-06-27 20:41 ` Emilio G. Cota
2016-06-27 21:02 ` Richard Henderson
2016-06-27 19:01 ` Emilio G. Cota [this message]
2016-06-27 19:01 ` [Qemu-devel] [RFC 04/30] target-i386: add cmpxchg helpers Emilio G. Cota
2016-06-27 19:01 ` [Qemu-devel] [RFC 05/30] target-i386: emulate LOCK'ed cmpxchg using " Emilio G. Cota
2016-06-27 19:01 ` [Qemu-devel] [RFC 06/30] target-i386: emulate LOCK'ed cmpxchg8b/16b " Emilio G. Cota
2016-06-27 19:01 ` [Qemu-devel] [RFC 07/30] atomics: add atomic_xor Emilio G. Cota
2016-06-27 19:01 ` [Qemu-devel] [RFC 08/30] atomics: add atomic_op_fetch variants Emilio G. Cota
2016-06-27 19:01 ` [Qemu-devel] [RFC 09/30] softmmu: add atomic helpers Emilio G. Cota
2016-06-27 19:01 ` [Qemu-devel] [RFC 10/30] cpu_ldst: add cpu_atomic helpers Emilio G. Cota
2016-06-27 19:01 ` [Qemu-devel] [RFC 11/30] target-i386: add atomic helpers Emilio G. Cota
2016-06-27 20:27 ` Richard Henderson
2016-06-27 21:39 ` Emilio G. Cota
2016-06-27 19:01 ` [Qemu-devel] [RFC 12/30] target-i386: emulate LOCK'ed OP instructions using " Emilio G. Cota
2016-06-27 19:01 ` [Qemu-devel] [RFC 13/30] target-i386: emulate LOCK'ed INC using atomic helper Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 14/30] target-i386: emulate LOCK'ed NOT " Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 15/30] target-i386: emulate LOCK'ed NEG using cmpxchg helper Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 16/30] target-i386: emulate LOCK'ed XADD using atomic helper Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 17/30] target-i386: emulate LOCK'ed BTX ops using atomic helpers Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 18/30] target-i386: emulate XCHG using atomic helper Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 19/30] tests: add atomic_add-bench Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 20/30] target-i386: remove helper_lock() Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 21/30] target-arm: add cmpxchg helpers Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 22/30] target-arm: emulate LL/SC using " Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 23/30] target-arm: add atomic_xchg helper Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 24/30] target-arm: emulate SWP with " Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 25/30] helper: add DEF_HELPER_6 Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 26/30] target-arm: add cmpxchg helpers for aarch64 Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 27/30] target-arm: emulate aarch64's LL/SC using cmpxchg helpers Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 28/30] linux-user: remove handling of ARM's EXCP_STREX Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 29/30] linux-user: remove handling of aarch64's EXCP_STREX Emilio G. Cota
2016-06-27 19:02 ` [Qemu-devel] [RFC 30/30] target-arm: remove EXCP_STREX + cpu_exclusive_{test, info} Emilio G. Cota
2016-06-28 8:45 ` [Qemu-devel] [RFC 00/30] cmpxchg-based emulation of atomics Lluís Vilanova
2016-06-28 15:48 ` Richard Henderson
2016-06-28 19:52 ` Emilio G. Cota
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1467054136-10430-4-git-send-email-cota@braap.org \
--to=cota@braap.org \
--cc=a.rigo@virtualopensystems.com \
--cc=alex.bennee@linaro.org \
--cc=mttcg@listserver.greensocs.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
--cc=serge.fdrv@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).