From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42012) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHuZv-0001WM-Dx for qemu-devel@nongnu.org; Tue, 28 Jun 2016 11:05:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bHuZq-0001Zb-1k for qemu-devel@nongnu.org; Tue, 28 Jun 2016 11:05:31 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:50385) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHuZp-0001ZW-Ph for qemu-devel@nongnu.org; Tue, 28 Jun 2016 11:05:25 -0400 Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u5SF0EEc037711 for ; Tue, 28 Jun 2016 11:05:24 -0400 Received: from e23smtp08.au.ibm.com (e23smtp08.au.ibm.com [202.81.31.141]) by mx0a-001b2d01.pphosted.com with ESMTP id 23sp1q5n0k-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 28 Jun 2016 11:05:24 -0400 Received: from localhost by e23smtp08.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 29 Jun 2016 01:05:21 +1000 From: Bharata B Rao Date: Tue, 28 Jun 2016 20:35:02 +0530 Message-Id: <1467126302-15604-1-git-send-email-bharata@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v0] spapr: Restore support for older PowerPC CPU cores List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, thuth@redhat.com, Bharata B Rao Introduction of core based CPU hotplug for PowerPC sPAPR didn't add support for 970 and POWER5+ based core types. Add support for the same. Signed-off-by: Bharata B Rao --- TODO: - There are few other variants of 970, like 970fx etc for which I have not added core types since I am not sure if they fall under sPAPR category. - Is it time to add core type for POWER8NVL yet ? hw/ppc/spapr_cpu_core.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 8b802a6..cebeef5 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -325,7 +325,6 @@ static void spapr_cpu_core_class_init(ObjectClass *oc, void *data) /* * instance_init routines from different flavours of sPAPR CPU cores. - * TODO: Add support for 'host' core type. */ #define SPAPR_CPU_CORE_INITFN(_type, _fname) \ static void glue(glue(spapr_cpu_core_, _fname), _initfn(Object *obj)) \ @@ -338,6 +337,8 @@ static void glue(glue(spapr_cpu_core_, _fname), _initfn(Object *obj)) \ core->cpu_class = oc; \ } +SPAPR_CPU_CORE_INITFN(970_v2.2, 970); +SPAPR_CPU_CORE_INITFN(POWER5+_v2.1, POWER5plus); SPAPR_CPU_CORE_INITFN(POWER7_v2.3, POWER7); SPAPR_CPU_CORE_INITFN(POWER7+_v2.1, POWER7plus); SPAPR_CPU_CORE_INITFN(POWER8_v2.0, POWER8); @@ -349,6 +350,12 @@ typedef struct SPAPRCoreInfo { } SPAPRCoreInfo; static const SPAPRCoreInfo spapr_cores[] = { + /* 970 */ + { .name = "970", .initfn = spapr_cpu_core_970_initfn }, + + /* POWER5 */ + { .name = "POWER5+", .initfn = spapr_cpu_core_POWER5plus_initfn }, + /* POWER7 and aliases */ { .name = "POWER7_v2.3", .initfn = spapr_cpu_core_POWER7_initfn }, { .name = "POWER7", .initfn = spapr_cpu_core_POWER7_initfn }, -- 2.1.0