From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39467) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bK9Ly-0008S6-Ds for qemu-devel@nongnu.org; Mon, 04 Jul 2016 15:16:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bK9Lw-0003S3-HG for qemu-devel@nongnu.org; Mon, 04 Jul 2016 15:16:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38508) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bK9Lw-0003Rz-BR for qemu-devel@nongnu.org; Mon, 04 Jul 2016 15:16:20 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0A6063B716 for ; Mon, 4 Jul 2016 19:16:20 +0000 (UTC) From: "Dr. David Alan Gilbert (git)" Date: Mon, 4 Jul 2016 20:16:08 +0100 Message-Id: <1467659769-15900-6-git-send-email-dgilbert@redhat.com> In-Reply-To: <1467659769-15900-1-git-send-email-dgilbert@redhat.com> References: <1467659769-15900-1-git-send-email-dgilbert@redhat.com> Subject: [Qemu-devel] [PATCH v2 5/6] x86: fix up 32 bit phys_bits case List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, pbonzini@redhat.com, ehabkost@redhat.com, marcel@redhat.com, mst@redhat.com, kraxel@redhat.com From: "Dr. David Alan Gilbert" On 32 bit systems fix up phys_bits to be consistent with what we tell the guest; don't ever bother with using the phys_bits property. Signed-off-by: Dr. David Alan Gilbert --- target-i386/cpu.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index d45d2a6..e15abea 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2609,11 +2609,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, */ *eax = 0x00003000 + cpu->phys_bits; } else { - if (env->features[FEAT_1_EDX] & CPUID_PSE36) { - *eax = 0x00000024; /* 36 bits physical */ - } else { - *eax = 0x00000020; /* 32 bits physical */ - } + *eax = cpu->phys_bits; } *ebx = 0; *ecx = 0; @@ -2990,6 +2986,15 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) cpu->phys_bits = host_phys_bits; } + } else { + /* For 32 bit systems don't use the user set value, but keep + * phys_bits consistent with what we tell the guest. + */ + if (env->features[FEAT_1_EDX] & CPUID_PSE36) { + cpu->phys_bits = 36; + } else { + cpu->phys_bits = 32; + } } cpu_exec_init(cs, &error_abort); -- 2.7.4