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From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org
Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
	jasowang@redhat.com, marcel@redhat.com, mst@redhat.com,
	pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com,
	alex.williamson@redhat.com, wexu@redhat.com,
	davidkiarie4@gmail.com, peterx@redhat.com
Subject: [Qemu-devel] [PATCH v11 11/28] intel_iommu: handle interrupt remap enable
Date: Tue,  5 Jul 2016 16:19:12 +0800	[thread overview]
Message-ID: <1467706769-12505-12-git-send-email-peterx@redhat.com> (raw)
In-Reply-To: <1467706769-12505-1-git-send-email-peterx@redhat.com>

Handle writting to IRE bit in global command register.

Signed-off-by: Peter Xu <peterx@redhat.com>
---
 hw/i386/intel_iommu.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index c793031..a12091e 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -1183,6 +1183,22 @@ static void vtd_handle_gcmd_te(IntelIOMMUState *s, bool en)
     }
 }
 
+/* Handle Interrupt Remap Enable/Disable */
+static void vtd_handle_gcmd_ire(IntelIOMMUState *s, bool en)
+{
+    VTD_DPRINTF(CSR, "Interrupt Remap Enable %s", (en ? "on" : "off"));
+
+    if (en) {
+        s->intr_enabled = true;
+        /* Ok - report back to driver */
+        vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_IRES);
+    } else {
+        s->intr_enabled = false;
+        /* Ok - report back to driver */
+        vtd_set_clear_mask_long(s, DMAR_GSTS_REG, VTD_GSTS_IRES, 0);
+    }
+}
+
 /* Handle write to Global Command Register */
 static void vtd_handle_gcmd_write(IntelIOMMUState *s)
 {
@@ -1207,6 +1223,10 @@ static void vtd_handle_gcmd_write(IntelIOMMUState *s)
         /* Set/update the interrupt remapping root-table pointer */
         vtd_handle_gcmd_sirtp(s);
     }
+    if (changed & VTD_GCMD_IRE) {
+        /* Interrupt remap enable/disable */
+        vtd_handle_gcmd_ire(s, val & VTD_GCMD_IRE);
+    }
 }
 
 /* Handle write to Context Command Register */
-- 
2.4.11

  parent reply	other threads:[~2016-07-05  8:21 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-05  8:19 [Qemu-devel] [PATCH v11 00/28] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 01/28] x86-iommu: introduce parent class Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 02/28] intel_iommu: rename VTD_PCI_DEVFN_MAX to x86-iommu Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 03/28] x86-iommu: provide x86_iommu_get_default Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 04/28] x86-iommu: q35: generalize find_add_as() Peter Xu
2016-07-09  8:14   ` Jan Kiszka
2016-07-11  5:32     ` Peter Xu
2016-07-11  5:46       ` David Kiarie
2016-07-11  6:49         ` Peter Xu
2016-07-11  7:16           ` David Kiarie
2016-07-11  7:41             ` Peter Xu
2016-07-11  8:30               ` Paolo Bonzini
2016-07-11  8:40                 ` Peter Xu
2016-07-11  9:11               ` David Kiarie
2016-07-11  9:25                 ` Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 05/28] x86-iommu: introduce "intremap" property Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 06/28] acpi: enable INTR for DMAR report structure Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 07/28] intel_iommu: allow queued invalidation for IR Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 08/28] intel_iommu: set IR bit for ECAP register Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 09/28] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 10/28] intel_iommu: define interrupt remap table addr register Peter Xu
2016-07-05  8:19 ` Peter Xu [this message]
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 12/28] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 13/28] intel_iommu: add IR translation faults defines Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 14/28] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-07-13 13:17   ` David Kiarie
2016-07-14  5:23     ` Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 15/28] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 16/28] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 17/28] intel_iommu: add support for split irqchip Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 18/28] x86-iommu: introduce IEC notifiers Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 19/28] ioapic: register IOMMU IEC notifier for ioapic Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 20/28] intel_iommu: Add support for Extended Interrupt Mode Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 21/28] intel_iommu: add SID validation for IR Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 22/28] kvm-irqchip: simplify kvm_irqchip_add_msi_route Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 23/28] kvm-irqchip: i386: add hook for add/remove virq Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 24/28] kvm-irqchip: x86: add msi route notify fn Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 25/28] kvm-irqchip: do explicit commit when update irq Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 26/28] intel_iommu: support all masks in interrupt entry cache invalidation Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 27/28] kvm-all: add trace events for kvm irqchip ops Peter Xu
2016-07-05  8:19 ` [Qemu-devel] [PATCH v11 28/28] intel_iommu: disallow kernel-irqchip=on with IR Peter Xu
2016-07-08 16:01 ` [Qemu-devel] [PATCH v11 00/28] IOMMU: Enable interrupt remapping for Intel IOMMU Radim Krčmář
2016-07-08 16:36   ` Paolo Bonzini
2016-07-08 18:06     ` Radim Krčmář

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