From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35620) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bKVd3-0003TU-TY for qemu-devel@nongnu.org; Tue, 05 Jul 2016 15:03:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bKVd1-0000Ed-Tl for qemu-devel@nongnu.org; Tue, 05 Jul 2016 15:03:28 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48617) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bKVd1-0000EG-MJ for qemu-devel@nongnu.org; Tue, 05 Jul 2016 15:03:27 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 44821C05B1E5 for ; Tue, 5 Jul 2016 19:03:27 +0000 (UTC) From: "Dr. David Alan Gilbert (git)" Date: Tue, 5 Jul 2016 20:03:18 +0100 Message-Id: <1467745398-28183-5-git-send-email-dgilbert@redhat.com> In-Reply-To: <1467745398-28183-1-git-send-email-dgilbert@redhat.com> References: <1467745398-28183-1-git-send-email-dgilbert@redhat.com> Subject: [Qemu-devel] [PATCH v3 4/4] x86: Set physical address bits based on host List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, pbonzini@redhat.com, ehabkost@redhat.com, marcel@redhat.com, mst@redhat.com, kraxel@redhat.com From: "Dr. David Alan Gilbert" A special case based on the previous phys-bits property; if it's the magic value 0 then use the hosts capabilities. We can also use the value we read from the host to check the users explicitly set value and warn them if it doesn't match. Signed-off-by: Dr. David Alan Gilbert --- target-i386/cpu.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index f33cf58..6ebd26b 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2952,7 +2952,60 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) & CPUID_EXT2_AMD_ALIASES); } + /* For 64bit systems think about the number of physical bits to present. + * ideally this should be the same as the host; anything other than matching + * the host can cause incorrect guest behaviour. + * QEMU used to pick the magic value of 40 bits that corresponds to + * consumer AMD devices but nothing esle. + */ if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { + if (kvm_enabled()) { + /* Read the hosts physical address size, and compare it to what we + * were asked for; note old machine types default to 40 bits + */ + uint32_t eax; + uint32_t host_phys_bits = 0; + static bool warned; + + host_cpuid(0x80000000, 0, &eax, NULL, NULL, NULL); + if (eax >= 0x80000008) { + host_cpuid(0x80000008, 0, &eax, NULL, NULL, NULL); + /* Note: According to AMD doc 25481 rev 2.34 they have a field + * at 23:16 that can specify a maximum physical address bits for + * the guest that can override this value; but I've not seen + * anything with that set. + */ + host_phys_bits = eax & 0xff; + } else { + /* It's an odd 64 bit machine that doesn't have the leaf for + * physical address bits; fall back to 36 that's most older + * Intel. + */ + host_phys_bits = 36; + } + + if (cpu->phys_bits == 0) { + /* The user asked for us to use the host physical bits */ + cpu->phys_bits = host_phys_bits; + } + + /* Print a warning if the user set it to a value that's not the + * host value. + */ + if (cpu->phys_bits != host_phys_bits && cpu->phys_bits != 9999 && + !warned) { + error_report("Warning: Host physical bits (%u)" + " does not match phys_bits (%u)", + host_phys_bits, cpu->phys_bits); + warned = true; + } + } else { + if (cpu->phys_bits == 0) { + error_setg(errp, "phys_bits can not be read from the host in" + " TCG mode"); + return; + } + } /* 9999 is a special meaning 'use the old default', */ if (cpu->phys_bits == 9999) { -- 2.7.4