Re: [Qemu-devel] [Qemu-ppc] [PATCH 8/9] ppc: Add missing slbfee. instruction on ppc64 BookS processors

[Benjamin Herrenschmidt <benh@kernel.crashing.org>]

On Wed, 2016-07-06 at 08:57 +0200, Cédric Le Goater wrote:
> 
> > The -1 result is now handled in the JITed code to do the right
> thing
> > (well, afaik).
> 
> well, no. It should be a 0 when the slb is not found, and thus no 
> machine check. That is how I understand : 

Right, which is afaik what the current qemu code does no ?

The -1 isn't the function return, it's the pointer-argument
return, which goes into rT. This is then handled in the
generated code:

    gen_helper_find_slb_vsid(cpu_gpr[rS(ctx->opcode)], cpu_env,
                             cpu_gpr[rB(ctx->opcode)]);
    l1 = gen_new_label();
    l2 = gen_new_label();
    tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so);

We clear CR (except so)

    tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rS(ctx->opcode)], -1, l1);

We branch to l1 if rT is -1
 
    tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], 1 << CRF_EQ);

We set EQ if we didn't branch

    tcg_gen_br(l2);

Then go to l2 (skip the next bit)

    gen_set_label(l1);
    tcg_gen_movi_tl(cpu_gpr[rS(ctx->opcode)], 0);

We clear rS if it was -1

    gen_set_label(l2);