From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51688) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bLAdY-00010L-PH for qemu-devel@nongnu.org; Thu, 07 Jul 2016 10:50:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bLAdT-0007MM-Te for qemu-devel@nongnu.org; Thu, 07 Jul 2016 10:50:44 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:29407 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bLAdT-0007M1-PG for qemu-devel@nongnu.org; Thu, 07 Jul 2016 10:50:39 -0400 Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u67En5in144189 for ; Thu, 7 Jul 2016 10:50:38 -0400 Received: from e23smtp08.au.ibm.com (e23smtp08.au.ibm.com [202.81.31.141]) by mx0a-001b2d01.pphosted.com with ESMTP id 2415xmex0k-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 07 Jul 2016 10:50:38 -0400 Received: from localhost by e23smtp08.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 8 Jul 2016 00:50:34 +1000 From: Bharata B Rao Date: Thu, 7 Jul 2016 20:20:20 +0530 Message-Id: <1467903025-13383-1-git-send-email-bharata@linux.vnet.ibm.com> Subject: [Qemu-devel] [RFC PATCH v2 0/5] sPAPR: Fix migration when CPUs are removed in random order List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, imammedo@redhat.com, groug@kaod.org, nikunj@linux.vnet.ibm.com, pbonzini@redhat.com, Bharata B Rao device_add/del based CPU hotplug and unplug support is upstream for sPAPR PowerPC and is under development for x86. Both of these will support CPU device removal in random order (and not necessarily in LIFO order). Random order removal will result in holes in cpu_index range which causes migration to fail. This needs fixes in both generic code as well as arch specific code. - CPUState::stable_cpu_id is newly introduced and used as instance_id when registering CPU devices using vmstate_register. stable_cpu_id is set by the target machine code. To support forward migration, as per Igor's suggestion, this needs to be done conditionally based on machine type version. - From pseries-2.7 onwards, we start using stable_cpu_id for migration as well as in XICS code. vmstate registration calls are moved to cpu_common_realizefn and newly introduced cpu_common_unrealizefn. This patchset depends on Greg Kurz's patchset where among other things, he is deriving cpu_dt_it (which is stable_cpu_id for pseries-2.7 onwards) based on core-id and hence is based on ppc-vcpu-dt-id-rework branch of his tree. Changes in v2 ------------- - s/migration_id/stable_cpu_id and this is set by the machine code after CPU init but before realize. - s/use-migration-id/has-migration-id and use DEFINE_PROP_BOOL to simplify the code. - Start with use-migration-id turned off by default. - Consolidate the code that obtains the 'server' in XICS code into a separate routine. v1: https://www.mail-archive.com/qemu-devel@nongnu.org/msg384135.html Bharata B Rao (5): cpu,target-ppc: Move cpu_vmstate_[un]register calls to cpu_common_[un]realize cpu: Introduce CPUState::stable_cpu_id spapr: Set stable_cpu_id for threads of CPU cores xics: Use stable_cpu_id instead of cpu_index in XICS code spapr: Enable the use of stable_cpu_id from pseries-2.7 onwards exec.c | 55 ++++++++++++++++++++++++++++----------------- hw/intc/xics.c | 21 +++++++++++++---- hw/intc/xics_kvm.c | 10 ++++----- hw/intc/xics_spapr.c | 29 ++++++++++++++---------- hw/ppc/spapr.c | 14 ++++++++++++ hw/ppc/spapr_cpu_core.c | 7 ++++++ include/hw/compat.h | 3 +++ include/hw/ppc/xics.h | 1 + include/qom/cpu.h | 7 ++++++ qom/cpu.c | 13 +++++++++++ target-ppc/cpu-qom.h | 2 ++ target-ppc/translate_init.c | 3 +++ 12 files changed, 123 insertions(+), 42 deletions(-) -- 2.7.4