From: "Cédric Le Goater" <clg@kaod.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	Peter Crosthwaite <crosthwaite.peter@gmail.com>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	"Andrew Jeffery" <andrew@aj.id.au>,
	"Cédric Le Goater" <clg@kaod.org>
Subject: [Qemu-devel] [PATCH 4/5] ast2400: externalize revision numbers
Date: Fri,  8 Jul 2016 18:06:55 +0200	[thread overview]
Message-ID: <1467994016-11678-5-git-send-email-clg@kaod.org> (raw)
In-Reply-To: <1467994016-11678-1-git-send-email-clg@kaod.org>
AST2400_A0_SILICON_REV is defined twice. Fix this by including the
definition in the header file as well as the routine to check if a
silicon revision is supported. It will useful to reuse in other
controllers.
Let's add also AST2500_A0_SILICON_REV for future use.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 hw/arm/ast2400.c             | 2 --
 hw/misc/aspeed_scu.c         | 4 +---
 include/hw/misc/aspeed_scu.h | 5 +++++
 3 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/hw/arm/ast2400.c b/hw/arm/ast2400.c
index 055584362073..326fdb36eed5 100644
--- a/hw/arm/ast2400.c
+++ b/hw/arm/ast2400.c
@@ -34,8 +34,6 @@
 #define AST2400_FMC_FLASH_BASE   0x20000000
 #define AST2400_SPI_FLASH_BASE   0x30000000
 
-#define AST2400_A0_SILICON_REV   0x02000303
-
 static const int uart_irqs[] = { 9, 32, 33, 34, 10 };
 static const int timer_irqs[] = { 16, 17, 18, 35, 36, 37, 38, 39, };
 
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index b61c05ea4dbc..c7e2c8263f55 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -88,8 +88,6 @@
 #define PROT_KEY_UNLOCK 0x1688A8A8
 #define SCU_IO_REGION_SIZE 0x20000
 
-#define AST2400_A0_SILICON_REV     0x02000303U
-
 static const uint32_t ast2400_a0_resets[ASPEED_SCU_NR_REGS] = {
      [SYS_RST_CTRL]    = 0xFFCFFEDCU,
      [CLK_SEL]         = 0xF3F40000U,
@@ -212,7 +210,7 @@ static void aspeed_scu_reset(DeviceState *dev)
 
 static uint32_t aspeed_silicon_revs[] = { AST2400_A0_SILICON_REV, };
 
-static bool is_supported_silicon_rev(uint32_t silicon_rev)
+bool is_supported_silicon_rev(uint32_t silicon_rev)
 {
     int i;
 
diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h
index 6b8e46f85fad..fdfd982288f2 100644
--- a/include/hw/misc/aspeed_scu.h
+++ b/include/hw/misc/aspeed_scu.h
@@ -31,4 +31,9 @@ typedef struct AspeedSCUState {
     uint32_t hw_strap2;
 } AspeedSCUState;
 
+#define AST2400_A0_SILICON_REV   0x02000303U
+#define AST2500_A0_SILICON_REV   0x04000303U
+
+extern bool is_supported_silicon_rev(uint32_t silicon_rev);
+
 #endif /* ASPEED_SCU_H */
-- 
2.1.4
next prev parent reply	other threads:[~2016-07-08 16:08 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-08 16:06 [Qemu-devel] [PATCH 0/5] ast2400: some cleanups and a simple memory controller model Cédric Le Goater
2016-07-08 16:06 ` [Qemu-devel] [PATCH 1/5] hw/misc: fix typo in Aspeed SCU hw-strap2 property name Cédric Le Goater
2016-07-08 16:06 ` [Qemu-devel] [PATCH 2/5] ast2400: replace aspeed_smc_is_implemented() Cédric Le Goater
2016-07-08 16:06 ` [Qemu-devel] [PATCH 3/5] ast2400: pretend DMAs are done for U-boot Cédric Le Goater
2016-07-08 16:06 ` Cédric Le Goater [this message]
2016-07-08 16:06 ` [Qemu-devel] [PATCH 5/5] ast2400: add a memory controller device model Cédric Le Goater
2016-07-25 15:12   ` Peter Maydell
2016-07-25 15:55     ` Cédric Le Goater
2016-07-12 14:19 ` [Qemu-devel] [PATCH 0/5] ast2400: some cleanups and a simple memory controller model Peter Maydell
2016-07-12 16:20   ` Cédric Le Goater
2016-07-12 16:32     ` Cédric Le Goater
2016-07-12 17:10     ` Peter Maydell
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