From: Benjamin Herrenschmidt <benh@au1.ibm.com>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
David Gibson <david@gibson.dropbear.id.au>,
peter.maydell@linaro.org
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
"Cédric Le Goater" <clg@kaod.org>
Subject: Re: [Qemu-devel] [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set
Date: Sat, 09 Jul 2016 12:52:37 +1000 [thread overview]
Message-ID: <1468032757.20552.22.camel@au1.ibm.com> (raw)
In-Reply-To: <1468032411.20552.21.camel@kernel.crashing.org>
On Sat, 2016-07-09 at 12:46 +1000, Benjamin Herrenschmidt wrote:
> On Sat, 2016-07-09 at 01:43 +0100, Mark Cave-Ayland wrote:
> > On 01/07/16 07:41, David Gibson wrote:
> >
> > > From: Benjamin Herrenschmidt
> > >
> > > The architecture specifies that any instruction that sets MSR:PR
> > > will also
> > > set MSR:EE, IR and DR.
>
> .../...
>
> > Unfortunately this patch causes a regression and breaks booting OS
> > 9 and
> > OS X under qemu-system-ppc.
>
> Any idea what is breaking specifically ? The architecture is pretty
> clear
> here, could it be that they rely on old implementations allowing the
> incorrect combination ?
>
> Maybe we can make the restriction 64-bit server only...
Additionally, hreg_compute_mem_idx() will treat PR=1 as DR=1/IR=1
as well ! That means that if those old processors allow PR=1 and IR or
DR=0 and MacOS uses it, we do have a TLB coherency problem in qemu.
Cheers,
Ben.
next prev parent reply other threads:[~2016-07-09 2:52 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-01 6:41 [Qemu-devel] [PULL 00/23] ppc-for-2.7 queue 20160701 David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 01/23] ppc: Add a bunch of hypervisor SPRs to Book3s David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 02/23] ppc: Update LPCR definitions David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 03/23] ppc: Use a helper to filter writes to LPCR David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 04/23] ppc: Fix conditions for delivering external interrupts to a guest David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set David Gibson
2016-07-09 0:43 ` [Qemu-devel] [Qemu-ppc] " Mark Cave-Ayland
2016-07-09 2:46 ` Benjamin Herrenschmidt
2016-07-09 2:52 ` Benjamin Herrenschmidt [this message]
2016-07-09 3:00 ` Benjamin Herrenschmidt
2016-07-09 3:08 ` Benjamin Herrenschmidt
2016-07-09 3:22 ` [Qemu-devel] [PATCH] ppc: Fix support for odd MSR combinations Benjamin Herrenschmidt
2016-07-09 3:40 ` Benjamin Herrenschmidt
2016-07-09 3:41 ` [Qemu-devel] [PATCH v2] " Benjamin Herrenschmidt
2016-07-09 3:42 ` Benjamin Herrenschmidt
2016-07-09 9:56 ` Mark Cave-Ayland
2016-07-11 1:55 ` David Gibson
2016-07-11 18:30 ` Mark Cave-Ayland
2016-07-12 0:57 ` David Gibson
2016-07-09 9:04 ` [Qemu-devel] [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set Mark Cave-Ayland
2016-07-09 8:16 ` Cédric Le Goater
2016-07-09 8:25 ` Benjamin Herrenschmidt
2016-07-09 8:28 ` Cédric Le Goater
2016-07-01 6:41 ` [Qemu-devel] [PULL 06/23] ppc: Initial HDEC support David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 07/23] ppc: LPCR is a HV resource David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 08/23] ppc: Print HSRR0/HSRR1 in "info registers" David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 09/23] hw/ppc/spapr: Add some missing hcall function set strings David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 10/23] spapr: fix write-past-end-of-array error in cpu core device init code David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 11/23] spapr: Restore support for older PowerPC CPU cores David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 12/23] target-ppc: Eliminate redundant and incorrect function booke206_page_size_to_tlb David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 13/23] ppc: Fix 64K pages support in full emulation David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 14/23] ppc/xics: Rename existing xics to xics_spapr David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 15/23] ppc/xics: Move SPAPR specific code to a separate file David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 16/23] ppc/xics: Implement H_IPOLL using an accessor David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 17/23] ppc/xics: Replace "icp" with "xics" in most places David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 18/23] target-ppc: gen_pause for instructions: yield, mdoio, mdoom, miso David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 19/23] spapr: Restore support for 970MP and POWER8NVL CPU cores David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 20/23] spapr: drop reference on child object during core realization David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 21/23] spapr: do proper error propagation in spapr_cpu_core_realize_child() David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 22/23] spapr: drop duplicate variable in spapr_core_release() David Gibson
2016-07-01 6:41 ` [Qemu-devel] [PULL 23/23] qmp: fix spapr example of query-hotpluggable-cpus David Gibson
2016-07-01 13:28 ` [Qemu-devel] [PULL 00/23] ppc-for-2.7 queue 20160701 Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2016-07-09 17:42 [Qemu-devel] [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set G 3
2016-07-10 22:14 ` Cédric Le Goater
2016-07-11 3:09 ` Alfonso Gamboa
2016-07-11 7:02 ` Mark Cave-Ayland
2016-07-11 7:04 ` Mark Cave-Ayland
2016-07-11 7:51 ` Cédric Le Goater
2016-07-11 7:54 ` Cédric Le Goater
2016-07-11 18:11 ` Mark Cave-Ayland
2016-07-12 6:24 ` Cédric Le Goater
2016-07-12 7:29 ` Mark Cave-Ayland
2016-07-11 14:42 ` Programmingkid
2016-07-11 18:37 ` Mark Cave-Ayland
2016-07-12 3:30 ` Programmingkid
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