[Qemu-devel] [PULL 20/24] target-sparc: Remove helper_ldf_asi, helper_stf_asi

[Richard Henderson <rth@twiddle.net>]

We've now implemented all fp asis inline, except for the no-fault
memory reads.  The latter can be passed directly to helper_ld_asi.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-sparc/helper.h      |   2 -
 target-sparc/ldst_helper.c | 148 ---------------------------------------------
 target-sparc/translate.c   |  48 ++++++++++-----
 3 files changed, 32 insertions(+), 166 deletions(-)

diff --git a/target-sparc/helper.h b/target-sparc/helper.h
index f5afc8d..b506706 100644
--- a/target-sparc/helper.h
+++ b/target-sparc/helper.h
@@ -18,8 +18,6 @@ DEF_HELPER_2(wrcwp, void, env, tl)
 DEF_HELPER_FLAGS_2(array8, TCG_CALL_NO_RWG_SE, tl, tl, tl)
 DEF_HELPER_FLAGS_1(popc, TCG_CALL_NO_RWG_SE, tl, tl)
 DEF_HELPER_FLAGS_3(ldda_asi, TCG_CALL_NO_WG, void, env, tl, int)
-DEF_HELPER_5(ldf_asi, void, env, tl, int, int, int)
-DEF_HELPER_FLAGS_5(stf_asi, TCG_CALL_NO_WG, void, env, tl, int, int, int)
 DEF_HELPER_FLAGS_5(casx_asi, TCG_CALL_NO_WG, tl, env, tl, tl, tl, i32)
 DEF_HELPER_FLAGS_2(set_softint, TCG_CALL_NO_RWG, void, env, i64)
 DEF_HELPER_FLAGS_2(clear_softint, TCG_CALL_NO_RWG, void, env, i64)
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 711f4e9..6ce5ccc 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -2161,154 +2161,6 @@ void helper_ldda_asi(CPUSPARCState *env, target_ulong addr, int asi)
     QT0.low = l;
 }
 
-void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
-                    int rd)
-{
-    unsigned int i;
-    target_ulong val;
-
-    helper_check_align(env, addr, 3);
-    addr = asi_address_mask(env, asi, addr);
-
-    switch (asi) {
-    case ASI_BLK_P:  /* UA2007/JPS1 Block load primary */
-    case ASI_BLK_S:  /* UA2007/JPS1 Block load secondary */
-    case ASI_BLK_PL: /* UA2007/JPS1 Block load primary LE */
-    case ASI_BLK_SL: /* UA2007/JPS1 Block load secondary LE */
-        if (rd & 7) {
-            helper_raise_exception(env, TT_ILL_INSN);
-            return;
-        }
-        helper_check_align(env, addr, 0x3f);
-        for (i = 0; i < 8; i++, rd += 2, addr += 8) {
-            env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x8f, MO_Q);
-        }
-        return;
-
-    case ASI_BLK_AIUP_4V:   /* UA2007 Block load primary, user privilege */
-    case ASI_BLK_AIUS_4V:   /* UA2007 Block load secondary, user privilege */
-    case ASI_BLK_AIUP_L_4V: /* UA2007 Block load primary LE, user privilege */
-    case ASI_BLK_AIUS_L_4V: /* UA2007 Block load secondary LE, user privilege */
-    case ASI_BLK_AIUP:  /* JPS1 Block load primary, user privilege */
-    case ASI_BLK_AIUS:  /* JPS1 Block load secondary, user privilege */
-    case ASI_BLK_AIUPL: /* JPS1 Block load primary LE, user privilege */
-    case ASI_BLK_AIUSL: /* JPS1 Block load secondary LE, user privilege */
-        if (rd & 7) {
-            helper_raise_exception(env, TT_ILL_INSN);
-            return;
-        }
-        helper_check_align(env, addr, 0x3f);
-        for (i = 0; i < 8; i++, rd += 2, addr += 8) {
-            env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x19, MO_Q);
-        }
-        return;
-
-    default:
-        break;
-    }
-
-    switch (size) {
-    default:
-    case 4:
-        val = helper_ld_asi(env, addr, asi, MO_UL);
-        if (rd & 1) {
-            env->fpr[rd / 2].l.lower = val;
-        } else {
-            env->fpr[rd / 2].l.upper = val;
-        }
-        break;
-    case 8:
-        env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, MO_Q);
-        break;
-    case 16:
-        env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, MO_Q);
-        env->fpr[rd / 2 + 1].ll = helper_ld_asi(env, addr + 8, asi, MO_Q);
-        break;
-    }
-}
-
-void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
-                    int rd)
-{
-    unsigned int i;
-    target_ulong val;
-
-    addr = asi_address_mask(env, asi, addr);
-
-    switch (asi) {
-    case ASI_BLK_COMMIT_P: /* UA2007/JPS1 Block store primary (cache flush) */
-    case ASI_BLK_COMMIT_S: /* UA2007/JPS1 Block store secondary (cache flush) */
-    case ASI_BLK_P: /* UA2007/JPS1 Block store primary */
-    case ASI_BLK_S: /* UA2007/JPS1 Block store secondary */
-    case ASI_BLK_PL: /* UA2007/JPS1 Block store primary LE */
-    case ASI_BLK_SL: /* UA2007/JPS1 Block store secondary LE */
-        if (rd & 7) {
-            helper_raise_exception(env, TT_ILL_INSN);
-            return;
-        }
-        helper_check_align(env, addr, 0x3f);
-        for (i = 0; i < 8; i++, rd += 2, addr += 8) {
-            helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x8f, MO_Q);
-        }
-
-        return;
-    case ASI_BLK_AIUP_4V: /* UA2007 Block load primary, user privilege */
-    case ASI_BLK_AIUS_4V: /* UA2007 Block load secondary, user privilege */
-    case ASI_BLK_AIUP_L_4V: /* UA2007 Block load primary LE, user privilege */
-    case ASI_BLK_AIUS_L_4V: /* UA2007 Block load secondary LE, user privilege */
-    case ASI_BLK_AIUP: /* JPS1 Block store primary, user privilege */
-    case ASI_BLK_AIUS: /* JPS1 Block store secondary, user privilege */
-    case ASI_BLK_AIUPL: /* JPS1 Block load primary LE, user privilege */
-    case ASI_BLK_AIUSL: /* JPS1 Block load secondary LE, user privilege */
-        if (rd & 7) {
-            helper_raise_exception(env, TT_ILL_INSN);
-            return;
-        }
-        helper_check_align(env, addr, 0x3f);
-        for (i = 0; i < 8; i++, rd += 2, addr += 8) {
-            helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x19, MO_Q);
-        }
-
-        return;
-    case ASI_FL16_P: /* 16-bit floating point load primary */
-    case ASI_FL16_S: /* 16-bit floating point load secondary */
-    case ASI_FL16_PL: /* 16-bit floating point load primary, LE */
-    case ASI_FL16_SL: /* 16-bit floating point load secondary, LE */
-        val = env->fpr[rd / 2].l.lower;
-        helper_st_asi(env, addr, val, asi & 0x8d, MO_UW);
-        return;
-    case ASI_FL8_P: /* 8-bit floating point load primary */
-    case ASI_FL8_S: /* 8-bit floating point load secondary */
-    case ASI_FL8_PL: /* 8-bit floating point load primary, LE */
-    case ASI_FL8_SL: /* 8-bit floating point load secondary, LE */
-        val = env->fpr[rd / 2].l.lower;
-        helper_st_asi(env, addr, val, asi & 0x8d, MO_UB);
-        return;
-    default:
-        helper_check_align(env, addr, 3);
-        break;
-    }
-
-    switch (size) {
-    default:
-    case 4:
-        if (rd & 1) {
-            val = env->fpr[rd / 2].l.lower;
-        } else {
-            val = env->fpr[rd / 2].l.upper;
-        }
-        helper_st_asi(env, addr, val, asi, MO_UL);
-        break;
-    case 8:
-        helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, MO_Q);
-        break;
-    case 16:
-        helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, MO_Q);
-        helper_st_asi(env, addr + 8, env->fpr[rd / 2 + 1].ll, asi, MO_Q);
-        break;
-    }
-}
-
 target_ulong helper_casx_asi(CPUSPARCState *env, target_ulong addr,
                              target_ulong val1, target_ulong val2,
                              uint32_t asi)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index cee1e5c..2cf9f83 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -2400,13 +2400,36 @@ static void gen_ldf_asi(DisasContext *dc, TCGv addr,
     default:
         {
             TCGv_i32 r_asi = tcg_const_i32(da.asi);
-            TCGv_i32 r_size = tcg_const_i32(size);
-            TCGv_i32 r_rd = tcg_const_i32(rd);
+            TCGv_i32 r_mop = tcg_const_i32(da.memop);
 
             save_state(dc);
-            gen_helper_ldf_asi(cpu_env, addr, r_asi, r_size, r_rd);
-            tcg_temp_free_i32(r_rd);
-            tcg_temp_free_i32(r_size);
+            /* According to the table in the UA2011 manual, the only
+               other asis that are valid for ldfa/lddfa/ldqfa are
+               the NO_FAULT asis.  We still need a helper for these,
+               but we can just use the integer asi helper for them.  */
+            switch (size) {
+            case 4:
+                {
+                    TCGv d64 = tcg_temp_new_i64();
+                    gen_helper_ld_asi(d64, cpu_env, addr, r_asi, r_mop);
+                    d32 = gen_dest_fpr_F(dc);
+                    tcg_gen_extrl_i64_i32(d32, d64);
+                    tcg_temp_free_i64(d64);
+                    gen_store_fpr_F(dc, rd, d32);
+                }
+                break;
+            case 8:
+                gen_helper_ld_asi(cpu_fpr[rd / 2], cpu_env, addr, r_asi, r_mop);
+                break;
+            case 16:
+                gen_helper_ld_asi(cpu_fpr[rd / 2], cpu_env, addr, r_asi, r_mop);
+                tcg_gen_addi_tl(addr, addr, 8);
+                gen_helper_ld_asi(cpu_fpr[rd/2+1], cpu_env, addr, r_asi, r_mop);
+                break;
+            default:
+                g_assert_not_reached();
+            }
+            tcg_temp_free_i32(r_mop);
             tcg_temp_free_i32(r_asi);
         }
         break;
@@ -2478,17 +2501,10 @@ static void gen_stf_asi(DisasContext *dc, TCGv addr,
         break;
 
     default:
-        {
-            TCGv_i32 r_asi = tcg_const_i32(da.asi);
-            TCGv_i32 r_size = tcg_const_i32(size);
-            TCGv_i32 r_rd = tcg_const_i32(rd);
-
-            save_state(dc);
-            gen_helper_stf_asi(cpu_env, addr, r_asi, r_size, r_rd);
-            tcg_temp_free_i32(r_rd);
-            tcg_temp_free_i32(r_size);
-            tcg_temp_free_i32(r_asi);
-        }
+        /* According to the table in the UA2011 manual, the only
+           other asis that are valid for ldfa/lddfa/ldqfa are
+           the PST* asis, which aren't currently handled.  */
+        gen_exception(dc, TT_ILL_INSN);
         break;
     }
 }
-- 
2.7.4