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From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org
Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
	jasowang@redhat.com, marcel@redhat.com, mst@redhat.com,
	pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com,
	alex.williamson@redhat.com, wexu@redhat.com,
	davidkiarie4@gmail.com, peterx@redhat.com
Subject: [Qemu-devel] [PATCH v12 02/27] intel_iommu: rename VTD_PCI_DEVFN_MAX to x86-iommu
Date: Thu, 14 Jul 2016 13:56:11 +0800	[thread overview]
Message-ID: <1468475796-7397-3-git-send-email-peterx@redhat.com> (raw)
In-Reply-To: <1468475796-7397-1-git-send-email-peterx@redhat.com>

Signed-off-by: Peter Xu <peterx@redhat.com>
---
 hw/i386/intel_iommu.c         | 11 +++++++----
 include/hw/i386/intel_iommu.h |  1 -
 include/hw/i386/x86-iommu.h   |  2 ++
 3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index a430d7d..3ee5782 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -26,6 +26,8 @@
 #include "hw/pci/pci.h"
 #include "hw/pci/pci_bus.h"
 #include "hw/i386/pc.h"
+#include "hw/boards.h"
+#include "hw/i386/x86-iommu.h"
 
 /*#define DEBUG_INTEL_IOMMU*/
 #ifdef DEBUG_INTEL_IOMMU
@@ -192,7 +194,7 @@ static void vtd_reset_context_cache(IntelIOMMUState *s)
 
     VTD_DPRINTF(CACHE, "global context_cache_gen=1");
     while (g_hash_table_iter_next (&bus_it, NULL, (void**)&vtd_bus)) {
-        for (devfn_it = 0; devfn_it < VTD_PCI_DEVFN_MAX; ++devfn_it) {
+        for (devfn_it = 0; devfn_it < X86_IOMMU_PCI_DEVFN_MAX; ++devfn_it) {
             vtd_as = vtd_bus->dev_as[devfn_it];
             if (!vtd_as) {
                 continue;
@@ -964,7 +966,7 @@ static void vtd_context_device_invalidate(IntelIOMMUState *s,
     vtd_bus = vtd_find_as_from_bus_num(s, VTD_SID_TO_BUS(source_id));
     if (vtd_bus) {
         devfn = VTD_SID_TO_DEVFN(source_id);
-        for (devfn_it = 0; devfn_it < VTD_PCI_DEVFN_MAX; ++devfn_it) {
+        for (devfn_it = 0; devfn_it < X86_IOMMU_PCI_DEVFN_MAX; ++devfn_it) {
             vtd_as = vtd_bus->dev_as[devfn_it];
             if (vtd_as && ((devfn_it & mask) == (devfn & mask))) {
                 VTD_DPRINTF(INV, "invalidate context-cahce of devfn 0x%"PRIx16,
@@ -1916,7 +1918,8 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
 
     if (!vtd_bus) {
         /* No corresponding free() */
-        vtd_bus = g_malloc0(sizeof(VTDBus) + sizeof(VTDAddressSpace *) * VTD_PCI_DEVFN_MAX);
+        vtd_bus = g_malloc0(sizeof(VTDBus) + sizeof(VTDAddressSpace *) * \
+                            X86_IOMMU_PCI_DEVFN_MAX);
         vtd_bus->bus = bus;
         key = (uintptr_t)bus;
         g_hash_table_insert(s->vtd_as_by_busptr, &key, vtd_bus);
@@ -2032,7 +2035,7 @@ static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
     IntelIOMMUState *s = opaque;
     VTDAddressSpace *vtd_as;
 
-    assert(0 <= devfn && devfn <= VTD_PCI_DEVFN_MAX);
+    assert(0 <= devfn && devfn <= X86_IOMMU_PCI_DEVFN_MAX);
 
     vtd_as = vtd_find_add_as(s, bus, devfn);
     return &vtd_as->as;
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index 680a0c4..0794309 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -35,7 +35,6 @@
 #define VTD_PCI_BUS_MAX             256
 #define VTD_PCI_SLOT_MAX            32
 #define VTD_PCI_FUNC_MAX            8
-#define VTD_PCI_DEVFN_MAX           256
 #define VTD_PCI_SLOT(devfn)         (((devfn) >> 3) & 0x1f)
 #define VTD_PCI_FUNC(devfn)         ((devfn) & 0x07)
 #define VTD_SID_TO_BUS(sid)         (((sid) >> 8) & 0xff)
diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h
index 924f39a..fac693d 100644
--- a/include/hw/i386/x86-iommu.h
+++ b/include/hw/i386/x86-iommu.h
@@ -30,6 +30,8 @@
 #define  X86_IOMMU_GET_CLASS(obj) \
     OBJECT_GET_CLASS(X86IOMMUClass, obj, TYPE_X86_IOMMU_DEVICE)
 
+#define X86_IOMMU_PCI_DEVFN_MAX           256
+
 typedef struct X86IOMMUState X86IOMMUState;
 typedef struct X86IOMMUClass X86IOMMUClass;
 
-- 
2.4.11

  parent reply	other threads:[~2016-07-14  5:57 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-14  5:56 [Qemu-devel] [PATCH v12 00/27] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 01/27] x86-iommu: introduce parent class Peter Xu
2016-07-14  5:56 ` Peter Xu [this message]
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 03/27] x86-iommu: provide x86_iommu_get_default Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 04/27] x86-iommu: introduce "intremap" property Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 05/27] acpi: enable INTR for DMAR report structure Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 06/27] intel_iommu: allow queued invalidation for IR Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 07/27] intel_iommu: set IR bit for ECAP register Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 08/27] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 09/27] intel_iommu: define interrupt remap table addr register Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 10/27] intel_iommu: handle interrupt remap enable Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 11/27] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 12/27] intel_iommu: add IR translation faults defines Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 13/27] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-07-21 17:45   ` Michael S. Tsirkin
2016-07-22  3:17     ` Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 14/27] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 15/27] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 16/27] intel_iommu: add support for split irqchip Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 17/27] x86-iommu: introduce IEC notifiers Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 18/27] ioapic: register IOMMU IEC notifier for ioapic Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 19/27] intel_iommu: Add support for Extended Interrupt Mode Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 20/27] intel_iommu: add SID validation for IR Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 21/27] kvm-irqchip: simplify kvm_irqchip_add_msi_route Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 22/27] kvm-irqchip: i386: add hook for add/remove virq Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 23/27] kvm-irqchip: x86: add msi route notify fn Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 24/27] kvm-irqchip: do explicit commit when update irq Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 25/27] intel_iommu: support all masks in interrupt entry cache invalidation Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 26/27] kvm-all: add trace events for kvm irqchip ops Peter Xu
2016-07-14  5:56 ` [Qemu-devel] [PATCH v12 27/27] intel_iommu: disallow kernel-irqchip=on with IR Peter Xu
2016-09-22  8:29 ` [Qemu-devel] [PATCH v12 00/27] IOMMU: Enable interrupt remapping for Intel IOMMU Igor Mammedov
2016-09-22  9:08   ` Peter Xu

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