From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58252) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bNh47-0003rF-67 for qemu-devel@nongnu.org; Thu, 14 Jul 2016 09:52:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bNh44-0003ia-0E for qemu-devel@nongnu.org; Thu, 14 Jul 2016 09:52:34 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57961) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bNh43-0003iP-La for qemu-devel@nongnu.org; Thu, 14 Jul 2016 09:52:31 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1D5AF486B8 for ; Thu, 14 Jul 2016 13:52:31 +0000 (UTC) From: Paolo Bonzini Date: Thu, 14 Jul 2016 15:52:27 +0200 Message-Id: <1468504347-6413-2-git-send-email-pbonzini@redhat.com> In-Reply-To: <1468504347-6413-1-git-send-email-pbonzini@redhat.com> References: <1468504347-6413-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 1/1] Add optionrom compatible with fw_cfg DMA version List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Marc=20Mar=C3=AD?= , "Richard W . M . Jones" From: Marc Mar=C3=AD This optionrom is based on linuxboot.S. Signed-off-by: Marc Mar=C3=AD Signed-off-by: Richard W.M. Jones Message-Id: <1464027093-24073-2-git-send-email-rjones@redhat.com> [Add -fno-toplevel-reorder, support clang without -m16. - Paolo] Signed-off-by: Paolo Bonzini --- .gitignore | 4 + Makefile | 2 +- hw/i386/pc.c | 10 +- hw/nvram/fw_cfg.c | 2 +- include/hw/i386/pc.h | 4 + include/hw/nvram/fw_cfg.h | 1 + pc-bios/linuxboot_dma.bin | Bin 0 -> 1024 bytes pc-bios/optionrom/Makefile | 42 ++++-- pc-bios/optionrom/code16gcc.h | 3 + pc-bios/optionrom/linuxboot_dma.c | 294 ++++++++++++++++++++++++++++++++= ++++++ 10 files changed, 349 insertions(+), 13 deletions(-) create mode 100644 pc-bios/linuxboot_dma.bin create mode 100644 pc-bios/optionrom/code16gcc.h create mode 100644 pc-bios/optionrom/linuxboot_dma.c diff --git a/.gitignore b/.gitignore index 9b6a968..88ec249 100644 --- a/.gitignore +++ b/.gitignore @@ -95,6 +95,10 @@ /pc-bios/optionrom/linuxboot.bin /pc-bios/optionrom/linuxboot.raw /pc-bios/optionrom/linuxboot.img +/pc-bios/optionrom/linuxboot_dma.asm +/pc-bios/optionrom/linuxboot_dma.bin +/pc-bios/optionrom/linuxboot_dma.raw +/pc-bios/optionrom/linuxboot_dma.img /pc-bios/optionrom/multiboot.asm /pc-bios/optionrom/multiboot.bin /pc-bios/optionrom/multiboot.raw diff --git a/Makefile b/Makefile index c054bc6..ba92f9e 100644 --- a/Makefile +++ b/Makefile @@ -419,7 +419,7 @@ efi-pcnet.rom efi-rtl8139.rom efi-virtio.rom \ efi-e1000e.rom efi-vmxnet3.rom \ qemu-icon.bmp qemu_logo_no_text.svg \ bamboo.dtb petalogix-s3adsp1800.dtb petalogix-ml605.dtb \ -multiboot.bin linuxboot.bin kvmvapic.bin \ +multiboot.bin linuxboot.bin linuxboot_dma.bin kvmvapic.bin \ s390-ccw.img \ spapr-rtas.bin slof.bin \ palcode-clipper \ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index f56e225..1b8baa8 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -998,8 +998,13 @@ static void load_linux(PCMachineState *pcms, fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size); fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size); =20 - option_rom[nb_option_roms].name =3D "linuxboot.bin"; - option_rom[nb_option_roms].bootindex =3D 0; + if (fw_cfg_dma_enabled(fw_cfg)) { + option_rom[nb_option_roms].name =3D "linuxboot_dma.bin"; + option_rom[nb_option_roms].bootindex =3D 0; + } else { + option_rom[nb_option_roms].name =3D "linuxboot.bin"; + option_rom[nb_option_roms].bootindex =3D 0; + } nb_option_roms++; } =20 @@ -1291,6 +1296,7 @@ void xen_load_linux(PCMachineState *pcms) load_linux(pcms, fw_cfg); for (i =3D 0; i < nb_option_roms; i++) { assert(!strcmp(option_rom[i].name, "linuxboot.bin") || + !strcmp(option_rom[i].name, "linuxboot_dma.bin") || !strcmp(option_rom[i].name, "multiboot.bin")); rom_add_option(option_rom[i].name, option_rom[i].bootindex); } diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 74a0079..2873030 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -552,7 +552,7 @@ static bool is_version_1(void *opaque, int version_id= ) return version_id =3D=3D 1; } =20 -static bool fw_cfg_dma_enabled(void *opaque) +bool fw_cfg_dma_enabled(void *opaque) { FWCfgState *s =3D opaque; =20 diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 2123532..e38c95a 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -366,6 +366,10 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint6= 4_t *); #define PC_COMPAT_2_6 \ HW_COMPAT_2_6 \ {\ + .driver =3D "fw_cfg_io",\ + .property =3D "dma_enabled",\ + .value =3D "off",\ + },{\ .driver =3D TYPE_X86_CPU,\ .property =3D "cpuid-0xb",\ .value =3D "off",\ diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h index d008112..5c27a1f 100644 --- a/include/hw/nvram/fw_cfg.h +++ b/include/hw/nvram/fw_cfg.h @@ -182,5 +182,6 @@ FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, hwaddr dma_addr, AddressSpace *dma_as); =20 FWCfgState *fw_cfg_find(void); +bool fw_cfg_dma_enabled(void *opaque); =20 #endif diff --git a/pc-bios/linuxboot_dma.bin b/pc-bios/linuxboot_dma.bin new file mode 100644 index 0000000000000000000000000000000000000000..e1f623a1245efff0d46ea5b68= 5e0f18e4ef98d74 GIT binary patch literal 1024 zcmd6mziX307{@Q^tG-DiZ>p(g$dKVIh%T9=3DqM-1)wGcJY!KxJW`(h~-Bt;!#jBtbm z9lAI>If`HmD0vg9wINblk!l@67gN$=3D2eDW*ug_gPT>JyP;dt+J&wZbtZ~C#n!Tz~o zj3=3Dj(KEJ*^#!l)_mQr7*PmQM8$hE2ITk*;3<5#ZUh})ymX8Y&b7go%$;tR&$u7;7u zd7Q&ph$V;`5*|d8xQX0)4B`i}tBiRJVivhZ(1A#CL)y8mD6B{CjnC`{bTm=3DMXKl`$#}Z zhxPS-dEM@GB`+A9wh{9%R=3D26W}#UCn8I#H!Vog7g7j. + * + * Copyright (c) 2015-2016 Red Hat Inc. + * Authors: + * Marc Mar=C3=AD + * Richard W.M. Jones + */ + +asm( +".text\n" +".global _start\n" +"_start:\n" +" .short 0xaa55\n" +" .byte 0\n" /* size in 512 units, filled in by signrom.py */ +" .byte 0xcb\n" /* far return without prefix */ +" .org 0x18\n" +" .short 0\n" +" .short _pnph\n" +"_pnph:\n" +" .ascii \"$PnP\"\n" +" .byte 0x01\n" +" .byte (_pnph_len / 16)\n" +" .short 0x0000\n" +" .byte 0x00\n" +" .byte 0x00\n" +" .long 0x00000000\n" +" .short _manufacturer\n" +" .short _product\n" +" .long 0x00000000\n" +" .short 0x0000\n" +" .short 0x0000\n" +" .short _bev\n" +" .short 0x0000\n" +" .short 0x0000\n" +" .equ _pnph_len, . - _pnph\n" +"_manufacturer:\n" +" .asciz \"QEMU\"\n" +"_product:\n" +" .asciz \"Linux loader DMA\"\n" +" .align 4, 0\n" +"_bev:\n" +" cli\n" +" cld\n" +" jmp load_kernel\n" +); + +#include "../../include/hw/nvram/fw_cfg_keys.h" + +/* QEMU_CFG_DMA_CONTROL bits */ +#define BIOS_CFG_DMA_CTL_ERROR 0x01 +#define BIOS_CFG_DMA_CTL_READ 0x02 +#define BIOS_CFG_DMA_CTL_SKIP 0x04 +#define BIOS_CFG_DMA_CTL_SELECT 0x08 + +#define BIOS_CFG_DMA_ADDR_HIGH 0x514 +#define BIOS_CFG_DMA_ADDR_LOW 0x518 + +#define uint64_t unsigned long long +#define uint32_t unsigned int +#define uint16_t unsigned short + +#define barrier() asm("" : : : "memory") + +typedef struct FWCfgDmaAccess { + uint32_t control; + uint32_t length; + uint64_t address; +} __attribute__((packed)) FWCfgDmaAccess; + +static inline void outl(uint32_t value, uint16_t port) +{ + asm("outl %0, %w1" : : "a"(value), "Nd"(port)); +} + +static inline void set_es(void *addr) +{ + uint32_t seg =3D (uint32_t)addr >> 4; + asm("movl %0, %%es" : : "r"(seg)); +} + +#ifdef __clang__ +#define ADDR32 +#else +#define ADDR32 "addr32 " +#endif + +static inline uint16_t readw_es(uint16_t offset) +{ + uint16_t val; + asm(ADDR32 "movw %%es:(%1), %0" : "=3Dr"(val) : "r"((uint32_t)offset= )); + barrier(); + return val; +} + +static inline uint32_t readl_es(uint16_t offset) +{ + uint32_t val; + asm(ADDR32 "movl %%es:(%1), %0" : "=3Dr"(val) : "r"((uint32_t)offset= )); + barrier(); + return val; +} + +static inline void writel_es(uint16_t offset, uint32_t val) +{ + barrier(); + asm(ADDR32 "movl %0, %%es:(%1)" : : "r"(val), "r"((uint32_t)offset))= ; +} + +static inline uint32_t bswap32(uint32_t x) +{ + return + ((x & 0x000000ffU) << 24) | + ((x & 0x0000ff00U) << 8) | + ((x & 0x00ff0000U) >> 8) | + ((x & 0xff000000U) >> 24); +} + +static inline uint64_t bswap64(uint64_t x) +{ + return + ((x & 0x00000000000000ffULL) << 56) | + ((x & 0x000000000000ff00ULL) << 40) | + ((x & 0x0000000000ff0000ULL) << 24) | + ((x & 0x00000000ff000000ULL) << 8) | + ((x & 0x000000ff00000000ULL) >> 8) | + ((x & 0x0000ff0000000000ULL) >> 24) | + ((x & 0x00ff000000000000ULL) >> 40) | + ((x & 0xff00000000000000ULL) >> 56); +} + +static inline uint64_t cpu_to_be64(uint64_t x) +{ + return bswap64(x); +} + +static inline uint32_t cpu_to_be32(uint32_t x) +{ + return bswap32(x); +} + +static inline uint32_t be32_to_cpu(uint32_t x) +{ + return bswap32(x); +} + +static void bios_cfg_read_entry(void *buf, uint16_t entry, uint32_t len) +{ + FWCfgDmaAccess access; + uint32_t control =3D (entry << 16) | BIOS_CFG_DMA_CTL_SELECT + | BIOS_CFG_DMA_CTL_READ; + + access.address =3D cpu_to_be64((uint64_t)(uint32_t)buf); + access.length =3D cpu_to_be32(len); + access.control =3D cpu_to_be32(control); + + barrier(); + + outl(cpu_to_be32((uint32_t)&access), BIOS_CFG_DMA_ADDR_LOW); + + while (be32_to_cpu(access.control) & ~BIOS_CFG_DMA_CTL_ERROR) { + barrier(); + } +} + +/* Return top of memory using BIOS function E801. */ +static uint32_t get_e801_addr(void) +{ + uint16_t ax, bx, cx, dx; + uint32_t ret; + + asm("int $0x15\n" + : "=3Da"(ax), "=3Db"(bx), "=3Dc"(cx), "=3Dd"(dx) + : "a"(0xe801), "b"(0), "c"(0), "d"(0)); + + /* Not SeaBIOS, but in theory a BIOS could return CX=3DDX=3D0 in whi= ch + * case we need to use the result from AX & BX instead. + */ + if (cx =3D=3D 0 && dx =3D=3D 0) { + cx =3D ax; + dx =3D bx; + } + + if (dx) { + /* DX =3D extended memory above 16M, in 64K units. + * Convert it to bytes and return. + */ + ret =3D ((uint32_t)dx + 256 /* 16M in 64K units */) << 16; + } else { + /* This is a fallback path for machines with <=3D 16MB of RAM, + * which probably would never be the case, but deal with it + * anyway. + * + * CX =3D extended memory between 1M and 16M, in kilobytes + * Convert it to bytes and return. + */ + ret =3D ((uint32_t)cx + 1024 /* 1M in K */) << 10; + } + + return ret; +} + +/* Force the asm name without leading underscore, even on Win32. */ +extern void load_kernel(void) asm("load_kernel"); + +void load_kernel(void) +{ + void *setup_addr; + void *initrd_addr; + void *kernel_addr; + void *cmdline_addr; + uint32_t setup_size; + uint32_t initrd_size; + uint32_t kernel_size; + uint32_t cmdline_size; + uint32_t initrd_end_page, max_allowed_page; + uint32_t segment_addr, stack_addr; + + bios_cfg_read_entry(&setup_addr, FW_CFG_SETUP_ADDR, 4); + bios_cfg_read_entry(&setup_size, FW_CFG_SETUP_SIZE, 4); + bios_cfg_read_entry(setup_addr, FW_CFG_SETUP_DATA, setup_size); + + set_es(setup_addr); + + /* For protocol < 0x203 we don't have initrd_max ... */ + if (readw_es(0x206) < 0x203) { + /* ... so we assume initrd_max =3D 0x37ffffff. */ + writel_es(0x22c, 0x37ffffff); + } + + bios_cfg_read_entry(&initrd_addr, FW_CFG_INITRD_ADDR, 4); + bios_cfg_read_entry(&initrd_size, FW_CFG_INITRD_SIZE, 4); + + initrd_end_page =3D ((uint32_t)(initrd_addr + initrd_size) & -4096); + max_allowed_page =3D (readl_es(0x22c) & -4096); + + if (initrd_end_page !=3D 0 && max_allowed_page !=3D 0 && + initrd_end_page !=3D max_allowed_page) { + /* Initrd at the end of memory. Compute better initrd address + * based on e801 data + */ + initrd_addr =3D (void *)((get_e801_addr() - initrd_size) & -4096= ); + writel_es(0x218, (uint32_t)initrd_addr); + + } + + bios_cfg_read_entry(initrd_addr, FW_CFG_INITRD_DATA, initrd_size); + + bios_cfg_read_entry(&kernel_addr, FW_CFG_KERNEL_ADDR, 4); + bios_cfg_read_entry(&kernel_size, FW_CFG_KERNEL_SIZE, 4); + bios_cfg_read_entry(kernel_addr, FW_CFG_KERNEL_DATA, kernel_size); + + bios_cfg_read_entry(&cmdline_addr, FW_CFG_CMDLINE_ADDR, 4); + bios_cfg_read_entry(&cmdline_size, FW_CFG_CMDLINE_SIZE, 4); + bios_cfg_read_entry(cmdline_addr, FW_CFG_CMDLINE_DATA, cmdline_size)= ; + + /* Boot linux */ + segment_addr =3D ((uint32_t)setup_addr >> 4); + stack_addr =3D (uint32_t)(cmdline_addr - setup_addr - 16); + + /* As we are changing critical registers, we cannot leave freedom to= the + * compiler. + */ + asm("movw %%ax, %%ds\n" + "movw %%ax, %%es\n" + "movw %%ax, %%fs\n" + "movw %%ax, %%gs\n" + "movw %%ax, %%ss\n" + "movl %%ebx, %%esp\n" + "addw $0x20, %%ax\n" + "pushw %%ax\n" /* CS */ + "pushw $0\n" /* IP */ + /* Clear registers and jump to Linux */ + "xor %%ebx, %%ebx\n" + "xor %%ecx, %%ecx\n" + "xor %%edx, %%edx\n" + "xor %%edi, %%edi\n" + "xor %%ebp, %%ebp\n" + "lretw\n" + : : "a"(segment_addr), "b"(stack_addr)); +} --=20 2.7.4