From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44332) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bPBzK-0005HA-UB for qemu-devel@nongnu.org; Mon, 18 Jul 2016 13:05:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bPBzF-0006md-Qf for qemu-devel@nongnu.org; Mon, 18 Jul 2016 13:05:49 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:33199 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bPBzF-0006mZ-KE for qemu-devel@nongnu.org; Mon, 18 Jul 2016 13:05:45 -0400 Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u6IH0V4Y043711 for ; Mon, 18 Jul 2016 13:05:45 -0400 Received: from e28smtp01.in.ibm.com (e28smtp01.in.ibm.com [125.16.236.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 248ncp2hjr-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 18 Jul 2016 13:05:45 -0400 Received: from localhost by e28smtp01.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 18 Jul 2016 22:35:40 +0530 From: Nikunj A Dadhania Date: Mon, 18 Jul 2016 22:35:15 +0530 In-Reply-To: <1468861517-2508-1-git-send-email-nikunj@linux.vnet.ibm.com> References: <1468861517-2508-1-git-send-email-nikunj@linux.vnet.ibm.com> Message-Id: <1468861517-2508-12-git-send-email-nikunj@linux.vnet.ibm.com> Subject: [Qemu-devel] [RFC v1 11/13] target-ppc: add maddld instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Cc: qemu-devel@nongnu.org, aneesh.kumar@linux.vnet.ibm.com, benh@kernel.crashing.org, nikunj@linux.vnet.ibm.com maddld: Multiply-Add Low Doubleword Multiplies two 64-bit registers (RA * RB), adds third register(RC) to the result(quadword) and returns the lower dword in the target register(RT). Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 9464942..9717048 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7760,6 +7760,33 @@ GEN_VAFORM_PAIRED(vmsumshm, vmsumshs, 20) GEN_VAFORM_PAIRED(vsel, vperm, 21) GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23) +#if defined(TARGET_PPC64) +static void gen_maddld(DisasContext *ctx) +{ + TCGv_i64 lo = tcg_temp_new_i64(); + TCGv_i64 hi = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + TCGv_i64 t2 = tcg_temp_new_i64(); + TCGv_i64 zero = tcg_const_i64(0); + TCGv_i64 neg = tcg_const_i64(-1); + + if (Rc(ctx->opcode)) { + tcg_gen_muls2_i64(lo, hi, cpu_gpr[rA(ctx->opcode)], + cpu_gpr[rB(ctx->opcode)]); + tcg_gen_movi_i64(t2, -1); + tcg_gen_movcond_i64(TCG_COND_GE, t2, cpu_gpr[rC(ctx->opcode)], zero, zero, neg); + } + tcg_gen_mov_i64(t1, zero); + tcg_gen_add2_i64(cpu_gpr[rD(ctx->opcode)], t1, lo, hi, cpu_gpr[rC(ctx->opcode)], t2); + tcg_temp_free_i64(lo); + tcg_temp_free_i64(hi); + tcg_temp_free_i64(t1); + tcg_temp_free_i64(t2); + tcg_temp_free_i64(zero); + tcg_temp_free_i64(neg); +} +#endif /* defined(TARGET_PPC64) */ + GEN_VXFORM_NOA(vclzb, 1, 28) GEN_VXFORM_NOA(vclzh, 1, 29) GEN_VXFORM_NOA(vclzw, 1, 30) @@ -10373,6 +10400,9 @@ GEN_HANDLER(lvsr, 0x1f, 0x06, 0x01, 0x00000001, PPC_ALTIVEC), GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC), GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC), GEN_HANDLER(vmladduhm, 0x04, 0x11, 0xFF, 0x00000000, PPC_ALTIVEC), +#if defined(TARGET_PPC64) +GEN_HANDLER_E(maddld, 0x04, 0x19, 0xFF, 0x00000000, PPC_NONE, PPC2_ISA300), +#endif GEN_HANDLER2(evsel0, "evsel", 0x04, 0x1c, 0x09, 0x00000000, PPC_SPE), GEN_HANDLER2(evsel1, "evsel", 0x04, 0x1d, 0x09, 0x00000000, PPC_SPE), GEN_HANDLER2(evsel2, "evsel", 0x04, 0x1e, 0x09, 0x00000000, PPC_SPE), -- 2.7.4