[Qemu-devel] [PULL 0/2] target-arm queue

[Qemu-devel] [PULL 0/2] target-arm queue

[Peter Maydell]

Couple of stray patches for rc0...

-- PMM

The following changes since commit 5d3217340adcb6c4f0e4af5d2b865331eb2ff63d:

  disas: Fix ATTRIBUTE_UNUSED define clash with ALSA headers (2016-07-19 16:40:39 +0100)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160719

for you to fetch changes up to acd82796211041c5af43c8c523b85d250c2ccebe:

  arm_gicv3: Add assert()s to tell Coverity that offsets are aligned (2016-07-19 17:56:27 +0100)

----------------------------------------------------------------
target-arm queue:
 * fix two minor Coverity complaints

----------------------------------------------------------------
Peter Maydell (2):
      target-arm: Fix unreachable code in gicv3_class_name()
      arm_gicv3: Add assert()s to tell Coverity that offsets are aligned

 hw/intc/arm_gicv3_redist.c | 4 ++++
 target-arm/machine.c       | 3 +--
 2 files changed, 5 insertions(+), 2 deletions(-)

[Qemu-devel] [PULL 1/2] target-arm: Fix unreachable code in gicv3_class_name()

[Peter Maydell]

Coverity complains that the exit() in gicv3_class_name()
can be unreachable, because if TARGET_AARCH64 is defined
then all code paths return before reaching it. Move the
exit() up to the error_report() that it belongs with.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1468260552-8400-1-git-send-email-peter.maydell@linaro.org
---
 target-arm/machine.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/target-arm/machine.c b/target-arm/machine.c
index 2dbeb82..7a6ca31 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -340,10 +340,9 @@ const char *gicv3_class_name(void)
 #else
         error_report("KVM GICv3 acceleration is not supported on this "
                      "platform");
+        exit(1);
 #endif
     } else {
         return "arm-gicv3";
     }
-
-    exit(1);
 }
-- 
1.9.1

[Qemu-devel] [PULL 2/2] arm_gicv3: Add assert()s to tell Coverity that offsets are aligned

[Peter Maydell]

Coverity complains that the GICR_IPRIORITYR case in gicv3_readl()
can overflow an array, because it doesn't know that the offsets
passed to that function must be word aligned. Add some assert()s
which hopefully tell Coverity that this isn't possible.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1468261372-17508-1-git-send-email-peter.maydell@linaro.org
---
 hw/intc/arm_gicv3_redist.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c
index 2f60096..77e5cfa 100644
--- a/hw/intc/arm_gicv3_redist.c
+++ b/hw/intc/arm_gicv3_redist.c
@@ -420,6 +420,8 @@ MemTxResult gicv3_redist_read(void *opaque, hwaddr offset, uint64_t *data,
     MemTxResult r;
     int cpuidx;
 
+    assert((offset & (size - 1)) == 0);
+
     /* This region covers all the redistributor pages; there are
      * (for GICv3) two 64K pages per CPU. At the moment they are
      * all contiguous (ie in this one region), though we might later
@@ -468,6 +470,8 @@ MemTxResult gicv3_redist_write(void *opaque, hwaddr offset, uint64_t data,
     MemTxResult r;
     int cpuidx;
 
+    assert((offset & (size - 1)) == 0);
+
     /* This region covers all the redistributor pages; there are
      * (for GICv3) two 64K pages per CPU. At the moment they are
      * all contiguous (ie in this one region), though we might later
-- 
1.9.1

Re: [Qemu-devel] [PULL 0/2] target-arm queue

[Peter Maydell]

On 19 July 2016 at 18:03, Peter Maydell <peter.maydell@linaro.org> wrote:
> Couple of stray patches for rc0...
>
> -- PMM
>
> The following changes since commit 5d3217340adcb6c4f0e4af5d2b865331eb2ff63d:
>
>   disas: Fix ATTRIBUTE_UNUSED define clash with ALSA headers (2016-07-19 16:40:39 +0100)
>
> are available in the git repository at:
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160719
>
> for you to fetch changes up to acd82796211041c5af43c8c523b85d250c2ccebe:
>
>   arm_gicv3: Add assert()s to tell Coverity that offsets are aligned (2016-07-19 17:56:27 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * fix two minor Coverity complaints

Applied, thanks.

-- PMM