From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46526) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQGqG-0003Ey-Qh for qemu-devel@nongnu.org; Thu, 21 Jul 2016 12:28:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bQGqC-0008OJ-5O for qemu-devel@nongnu.org; Thu, 21 Jul 2016 12:28:56 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58202) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQGqB-0008OD-VV for qemu-devel@nongnu.org; Thu, 21 Jul 2016 12:28:52 -0400 Date: Thu, 21 Jul 2016 19:28:47 +0300 From: "Michael S. Tsirkin" Message-ID: <1469118288-4776-34-git-send-email-mst@redhat.com> References: <1469118288-4776-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1469118288-4776-1-git-send-email-mst@redhat.com> Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL v4 33/57] intel_iommu: support all masks in interrupt entry cache invalidation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Radim =?utf-8?B?S3LEjW3DocWZ?= , Paolo Bonzini , Richard Henderson , Eduardo Habkost From: Radim Kr=C4=8Dm=C3=A1=C5=99 Linux guests do not gracefully handle cases when the invalidation mask they wanted is not supported, probably because real hardware always allowed all. We can just say that all 16 masks are supported, because both ioapic_iec_notifier and kvm_update_msi_routes_all invalidate all caches. Signed-off-by: Radim Kr=C4=8Dm=C3=A1=C5=99 Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/intel_iommu_internal.h | 1 + hw/i386/intel_iommu.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_interna= l.h index 72b0114..0829a50 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -186,6 +186,7 @@ /* Interrupt Remapping support */ #define VTD_ECAP_IR (1ULL << 3) #define VTD_ECAP_EIM (1ULL << 4) +#define VTD_ECAP_MHMV (15ULL << 20) =20 /* CAP_REG */ /* (offset >> 4) << 24 */ diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 3f49c17..28ab53e 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2362,7 +2362,7 @@ static void vtd_init(IntelIOMMUState *s) s->ecap =3D VTD_ECAP_QI | VTD_ECAP_IRO; =20 if (x86_iommu->intr_supported) { - s->ecap |=3D VTD_ECAP_IR | VTD_ECAP_EIM; + s->ecap |=3D VTD_ECAP_IR | VTD_ECAP_EIM | VTD_ECAP_MHMV; } =20 vtd_reset_context_cache(s); --=20 MST