From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37344) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQI7w-0008Ve-Is for qemu-devel@nongnu.org; Thu, 21 Jul 2016 13:51:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bQI7v-00020c-KW for qemu-devel@nongnu.org; Thu, 21 Jul 2016 13:51:16 -0400 Received: from mx1.redhat.com ([209.132.183.28]:55769) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQI7v-00020Y-EY for qemu-devel@nongnu.org; Thu, 21 Jul 2016 13:51:15 -0400 Date: Thu, 21 Jul 2016 20:51:10 +0300 From: "Michael S. Tsirkin" Message-ID: <1469123413-20809-5-git-send-email-mst@redhat.com> References: <1469123413-20809-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1469123413-20809-1-git-send-email-mst@redhat.com> Subject: [Qemu-devel] [PULL v5 04/57] hw/mips: fix PCI bus initialization List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Marcel Apfelbaum , Mark Cave-Ayland , Leon Alrae , Aurelien Jarno From: Marcel Apfelbaum Delay the host-bridge 'realization' until the PCI root bus is attached. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Tested-by: Mark Cave-Ayland Acked-by: Leon Alrae Tested-by: Leon Alrae --- hw/mips/gt64xxx_pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 3f4523d..4811843 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1167,7 +1167,6 @@ PCIBus *gt64120_register(qemu_irq *pic) DeviceState *dev; dev = qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE); - qdev_init_nofail(dev); d = GT64120_PCI_HOST_BRIDGE(dev); phb = PCI_HOST_BRIDGE(dev); memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX); @@ -1178,6 +1177,7 @@ PCIBus *gt64120_register(qemu_irq *pic) &d->pci0_mem, get_system_io(), PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); + qdev_init_nofail(dev); memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000); pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); -- MST