From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com,
bharata@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com
Subject: [Qemu-devel] [RFC v2 02/13] target-ppc: Introduce POWER ISA 3.0 flag
Date: Sat, 23 Jul 2016 14:14:39 +0530 [thread overview]
Message-ID: <1469263490-19130-3-git-send-email-nikunj@linux.vnet.ibm.com> (raw)
In-Reply-To: <1469263490-19130-1-git-send-email-nikunj@linux.vnet.ibm.com>
This flag will be used for POWER9 instructions.
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
---
target-ppc/cpu.h | 5 ++++-
target-ppc/translate_init.c | 2 +-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 5fce1ff..c499315 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2094,6 +2094,8 @@ enum {
PPC2_TM = 0x0000000000020000ULL,
/* Server PM instructgions (ISA 2.06, Book III) */
PPC2_PM_ISA206 = 0x0000000000040000ULL,
+ /* POWER ISA 3.0 */
+ PPC2_ISA300 = 0x0000000000080000ULL,
#define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \
PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \
@@ -2101,7 +2103,8 @@ enum {
PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \
PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \
PPC2_ALTIVEC_207 | PPC2_ISA207S | PPC2_DFP | \
- PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206)
+ PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206 | \
+ PPC2_ISA300)
};
/*****************************************************************************/
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 5b100d0..d207f68 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8820,7 +8820,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 |
- PPC2_TM | PPC2_PM_ISA206;
+ PPC2_TM | PPC2_PM_ISA206 | PPC2_ISA300;
pcc->msr_mask = (1ull << MSR_SF) |
(1ull << MSR_TM) |
(1ull << MSR_VR) |
--
2.7.4
next prev parent reply other threads:[~2016-07-23 8:45 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-23 8:44 [Qemu-devel] [RFC v2 00/13] POWER9 TCG enablements - part1 Nikunj A Dadhania
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 01/13] target-ppc: Introduce Power9 family Nikunj A Dadhania
2016-07-25 1:26 ` David Gibson
2016-07-25 8:48 ` Nikunj A Dadhania
2016-07-23 8:44 ` Nikunj A Dadhania [this message]
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 03/13] target-ppc: adding addpcis instruction Nikunj A Dadhania
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 04/13] target-ppc: add cmprb instruction Nikunj A Dadhania
2016-07-23 16:06 ` Richard Henderson
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 05/13] target-ppc: add modulo word operations Nikunj A Dadhania
2016-07-24 1:24 ` Richard Henderson
2016-07-25 5:37 ` Nikunj A Dadhania
2016-07-25 6:07 ` [Qemu-devel] [Qemu-ppc] " Nikunj A Dadhania
2016-07-25 11:14 ` [Qemu-devel] " Nikunj A Dadhania
2016-07-25 14:34 ` Richard Henderson
2016-07-25 16:31 ` Nikunj A Dadhania
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 06/13] target-ppc: add modulo dword operations Nikunj A Dadhania
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 07/13] target-ppc: add cnttzd[.] instruction Nikunj A Dadhania
2016-07-24 1:26 ` Richard Henderson
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 08/13] target-ppc: add cnttzw[.] instruction Nikunj A Dadhania
2016-07-24 1:26 ` Richard Henderson
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 09/13] target-ppc: add cmpeqb instruction Nikunj A Dadhania
2016-07-24 1:31 ` Richard Henderson
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 10/13] target-ppc: add setb instruction Nikunj A Dadhania
2016-07-24 1:35 ` Richard Henderson
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 11/13] target-ppc: add maddld instruction Nikunj A Dadhania
2016-07-24 1:36 ` Richard Henderson
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 12/13] target-ppc: add maddhd and maddhdu instruction Nikunj A Dadhania
2016-07-24 1:36 ` Richard Henderson
2016-07-23 8:44 ` [Qemu-devel] [RFC v2 13/13] target-ppc: introduce opc4 for Expanded Opcode Nikunj A Dadhania
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1469263490-19130-3-git-send-email-nikunj@linux.vnet.ibm.com \
--to=nikunj@linux.vnet.ibm.com \
--cc=aneesh.kumar@linux.vnet.ibm.com \
--cc=bharata@linux.vnet.ibm.com \
--cc=david@gibson.dropbear.id.au \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).