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From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com,
	bharata@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com,
	Sandipan Das <sandipandas1990@gmail.com>
Subject: [Qemu-devel] [PATCH v3 09/15] target-ppc: add cnttzd[.] instruction
Date: Mon, 25 Jul 2016 22:50:34 +0530	[thread overview]
Message-ID: <1469467240-21273-10-git-send-email-nikunj@linux.vnet.ibm.com> (raw)
In-Reply-To: <1469467240-21273-1-git-send-email-nikunj@linux.vnet.ibm.com>

From: Sandipan Das <sandipandas1990@gmail.com>

Add ISA3.0 Count trailing zeros double word

Signed-off-by: Sandipan Das <sandipandas1990@gmail.com>
[ added ISA300 flag ]
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
---
 target-ppc/helper.h     |  1 +
 target-ppc/int_helper.c |  5 +++++
 target-ppc/translate.c  | 10 ++++++++++
 3 files changed, 16 insertions(+)

diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 1f5cfd0..0c29c01 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -44,6 +44,7 @@ DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
 DEF_HELPER_3(sraw, tl, env, tl, tl)
 #if defined(TARGET_PPC64)
 DEF_HELPER_FLAGS_1(cntlzd, TCG_CALL_NO_RWG_SE, tl, tl)
+DEF_HELPER_FLAGS_1(cnttzd, TCG_CALL_NO_RWG_SE, tl, tl)
 DEF_HELPER_FLAGS_1(popcntd, TCG_CALL_NO_RWG_SE, tl, tl)
 DEF_HELPER_FLAGS_2(bpermd, TCG_CALL_NO_RWG_SE, i64, i64, i64)
 DEF_HELPER_3(srad, tl, env, tl, tl)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 7445376..93e8dfa 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -150,6 +150,11 @@ target_ulong helper_cntlzd(target_ulong t)
 {
     return clz64(t);
 }
+
+target_ulong helper_cnttzd(target_ulong t)
+{
+    return ctz64(t);
+}
 #endif
 
 #if defined(TARGET_PPC64)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 6bf523d..c056320 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -1824,6 +1824,15 @@ static void gen_cntlzd(DisasContext *ctx)
     if (unlikely(Rc(ctx->opcode) != 0))
         gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]);
 }
+
+/* cnttzd */
+static void gen_cnttzd(DisasContext *ctx)
+{
+    gen_helper_cnttzd(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
+    if (unlikely(Rc(ctx->opcode) != 0)) {
+        gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]);
+    }
+}
 #endif
 
 /***                             Integer rotate                            ***/
@@ -10061,6 +10070,7 @@ GEN_HANDLER_E(prtyw, 0x1F, 0x1A, 0x04, 0x0000F801, PPC_NONE, PPC2_ISA205),
 #if defined(TARGET_PPC64)
 GEN_HANDLER(popcntd, 0x1F, 0x1A, 0x0F, 0x0000F801, PPC_POPCNTWD),
 GEN_HANDLER(cntlzd, 0x1F, 0x1A, 0x01, 0x00000000, PPC_64B),
+GEN_HANDLER_E(cnttzd, 0x1F, 0x1A, 0x11, 0x00000000, PPC_NONE, PPC2_ISA300),
 GEN_HANDLER_E(prtyd, 0x1F, 0x1A, 0x05, 0x0000F801, PPC_NONE, PPC2_ISA205),
 GEN_HANDLER_E(bpermd, 0x1F, 0x1C, 0x07, 0x00000001, PPC_NONE, PPC2_PERM_ISA206),
 #endif
-- 
2.7.4

  parent reply	other threads:[~2016-07-25 17:21 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-25 17:20 [Qemu-devel] [PATCH v3 00/15] POWER9 TCG enablements - part1 Nikunj A Dadhania
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 01/15] target-ppc: Introduce Power9 family Nikunj A Dadhania
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 02/15] target-ppc: Introduce POWER ISA 3.0 flag Nikunj A Dadhania
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 03/15] target-ppc: adding addpcis instruction Nikunj A Dadhania
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 04/15] target-ppc: add cmprb instruction Nikunj A Dadhania
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 05/15] target-ppc: add modulo word operations Nikunj A Dadhania
2016-07-26  0:09   ` Richard Henderson
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 06/15] target-ppc: add modulo dword operations Nikunj A Dadhania
2016-07-26  0:10   ` Richard Henderson
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 07/15] target-ppc: implement branch-less divw[o][.] Nikunj A Dadhania
2016-07-26  0:17   ` Richard Henderson
2016-07-26  1:52     ` Nikunj A Dadhania
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 08/15] target-ppc: implement branch-less divd[o][.] Nikunj A Dadhania
2016-07-25 17:20 ` Nikunj A Dadhania [this message]
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 10/15] target-ppc: add cnttzw[.] instruction Nikunj A Dadhania
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 11/15] target-ppc: add cmpeqb instruction Nikunj A Dadhania
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 12/15] target-ppc: add setb instruction Nikunj A Dadhania
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 13/15] target-ppc: add maddld instruction Nikunj A Dadhania
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 14/15] target-ppc: add maddhd and maddhdu instruction Nikunj A Dadhania
2016-07-25 17:20 ` [Qemu-devel] [PATCH v3 15/15] target-ppc: introduce opc4 for Expanded Opcode Nikunj A Dadhania

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